EPM5192LC-25 vs EPM5192LC-M091A 비교

다음의 상세 나란히 비교: EPM5192LC-25 제조: Altera 및 EPM5192LC-M091A 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM5192LC-25 EPM5192LC-M091A
브랜드 Altera Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $55.00 $62.00
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 5000 —
Macrocells 192 192
Logic Elements 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture) —
Pin-to-Pin Delay (tPD) 25 ns —
Speed Grade -25 (25 ns) —
패키지 JLCC-84 (ceramic J-lead chip carrier) LC (custom pin-grid / customer-specific, M091A designation)
실장 유형 Surface Mount —
Programmable Technology UV-erasable / OTP (EPROM-based) —
Programming Interface JTAG / Altera programming hardware (legacy) —
동작 온도 0C to +70C (commercial) [DATA_NEEDED: operating temperature grade]
공급 전압 5 V (typical, MAX 5000) —
I/O Standard TTL-compatible —
Configuration Memory Non-volatile EPROM (on-chip) Non-volatile EPROM (UV-erasable)
Manufacturer Altera Corporation (now Intel PSG) —
RoHS 상태 Unknown (legacy ceramic package typically non-RoHS) [DATA_NEEDED: RoHS status for EPM5192LC-M091A]
Device Family — MAX 5000 EPLD
User I/O Pins — 64
Dedicated Inputs — 7
Logic Array Blocks (LABs) — 12
Global Clock Inputs — 1
Propagation Delay (tpd) — 55 ns (typical, MAX 5000 family)
Supply Voltage (Vcc) — 5 V
Technology — UV-erasable CMOS, EPROM-based
Interconnect — Programmable Interconnect Array (PIA)
핀 수 — [DATA_NEEDED: pin count of LC-M091A package]
Development Tool — Altera MAX+PLUS II (legacy)

데이터시트 & 자료

모든 제품 보기 BOM 생성 견적 요청