EPM7128AETC144-10 vs EPM7128AETC144-7N 비교
다음의 상세 나란히 비교: EPM7128AETC144-10 제조: Altera 및 EPM7128AETC144-7N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM7128AETC144-7N - MAX 7000A CPLD, 128 Macros, 144-TQFP | Intel / Altera
EPM7128AETC144-7N ✓ 활성사양 비교
| 파라미터 | EPM7128AETC144-10 | EPM7128AETC144-7N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $21.70 | $39.82 |
| Family | MAX 7000A | MAX 7000A |
| Macrocells | 128 | — |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 8 | — |
| Maximum User I/Os | 36 | — |
| Pin-to-pin Logic Delay (tPD) | 10 ns | — |
| Maximum Internal Counter Frequency | 98 MHz | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Voltage Tolerance | 2.5 V / 3.3 V / 5 V | — |
| 동작 온도 | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| 패키지 | 144-pin TQFP (also referred to as LQFP-144) | 144-pin TQFP |
| Programming Interface | JTAG (IEEE Std. 1149.1) and ByteBlaster | — |
| Non-volatile Memory | EEPROM, instant-on | — |
| Global Clocks / Global OE | 2 / 2 | — |
| 실장 유형 | Surface Mount | Surface Mount |
| MSL 레벨 | MSL 3 (per JEDEC J-STD-020) | — |
| RoHS 상태 | [DATA_NEEDED: rohs status from manufacturer] | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Gates | — | 2500 (2.5K gates) |
| Macro Cells | — | 128 |
| User I/Os | — | 36 (in 144-pin TQFP) |
| Maximum Operating Frequency | — | 129.9 MHz |
| Pin-to-Pin Delay | — | 7.5 ns |
| Propagation Delay (tpd) | — | 7.5 ns |
| Supply Voltage (VCCINT) | — | 3.3 V |
| Process Technology | — | CMOS, EEPROM-based |
| Programmability | — | In-System Programmable (ISP) via JTAG |
| Boundary-Scan Test | — | IEEE Std 1149.1 (JTAG) |
| Pin-Compatible With | — | MAX 7000S 5.0V family (144-pin TQFP) |
| Lead-Free | — | Yes |