EPM7128STC100-10 vs EPM7128SQC100-10N 비교
다음의 상세 나란히 비교: EPM7128STC100-10 제조: Altera 및 EPM7128SQC100-10N 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
Altera
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 Obsolete
사양 비교
| 파라미터 | EPM7128STC100-10 | EPM7128SQC100-10N |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | 활성 |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $7.10 | $14.95 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | 2,500 |
| User I/Os | 84 | — |
| Logic Array Blocks | 8 (16 macrocells per LAB) | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Internal Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family | CMOS | — |
| Supply Voltage (VCCINT) | 5 V | 5 V (4.75 V to 5.25 V) |
| MultiVolt I/O Voltage | 3.3 V / 5 V | — |
| 패키지 | TQFP-100 (C100) | 100-pin PQFP (BQFP) |
| 핀 수 | 100 | — |
| 실장 유형 | Surface Mount | Surface Mount |
| Programmability | In-System Programmable (JTAG, IEEE 1149.1), EEPROM | — |
| 동작 온도 | 0C to +70C (commercial) | -40C to +85C (industrial) |
| RoHS 상태 | [DATA_NEEDED: RoHS compliance status not in provided data] | — |
| Logic Array Blocks (LABs) | — | 8 (16 macro cells each) |
| User I/O Pins | — | 84 |
| Maximum Frequency | — | 100 MHz |
| I/O Voltage Tolerance | — | 3.3 V or 5 V (MultiVolt interface) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Programming Interface | — | JTAG (IEEE Std 1149.1), 4-pin |
| Lead-Free / RoHS Status | — | Lead-free (N suffix) |
| Architecture Generation | — | Second-generation MAX |