EPM9560RC208-10 vs EPM9480RC208-15 비교

다음의 상세 나란히 비교: EPM9560RC208-10 제조: Intel 및 EPM9480RC208-15 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9560RC208-10 EPM9480RC208-15
브랜드 Intel Intel
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 Obsolete Obsolete
재고 상태 In Stock In Stock
단가 (USD) $15.40 $24.95
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 212 (208-pin package variant) —
Usable Gates 12,000 10,000 gates
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Frequency (fMAX) [DATA_NEEDED: internal toggle frequency in MHz] —
Supply Voltage (VCCINT) 5.0 V —
I/O Standards Supported 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) —
Configuration Memory EEPROM (in-system programmable via JTAG) EEPROM (non-volatile)
Process Technology 0.30 µm CMOS EEPROM —
동작 온도 0C to +70C (commercial) -40C to +85C (commercial)
패키지 208-pin RQFP (Plastic Quad Flat Pack) RQFP-208
실장 유형 Surface Mount Surface Mount
Lead-Free [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] —
RoHS 상태 [DATA_NEEDED: not stated in retrieved distributor listings] [DATA_NEEDED: RoHS compliance status]
Programmability JTAG (IEEE 1149.1) in-system programming In-System (ISP) via JTAG IEEE 1149.1
Logic Cells / Macro Cells — 480 macro cells
Maximum Operating Frequency — 117.6 MHz
Propagation Delay (tPD) — 15 ns
User I/O Pins — 153
공급 전압 — 5.0 V
Architecture — Multiple Array MatriX (MAX) - 3rd generation
MSL 레벨 — [DATA_NEEDED: MSL rating]

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