EPM9560RC208-18 vs EPM9560RC208-15 비교
다음의 상세 나란히 비교: EPM9560RC208-18 제조: Altera 및 EPM9560RC208-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM9560RC208-18 | EPM9560RC208-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | 수명 종료 | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $0.00 | $0.00 |
| Device Family | MAX 9000 (EPM9560) | — |
| Logic Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Usable Gates | 12,000 gates | 12,000 gates |
| Macrocells | 560 macrocells | — |
| Propagation Delay (tPD) | 18 ns (speed grade -18) | — |
| Maximum Operating Frequency | 117.6 MHz (family -15 grade reference) | — |
| 공급 전압 | 5 V | 5.0 V |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| User I/O Lines | 149 I/O lines | — |
| Flip-Flops | 772 flip-flops | — |
| 패키지 | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Package JESD-30 Code | S-PQFP-G208 | — |
| 실장 유형 | Surface Mount | Surface Mount |
| Configuration Memory | EEPROM (non-volatile, no external config PROM) | — |
| Technology | CMOS | — |
| 동작 온도 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| RoHS 상태 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| 수명 주기 상태 | EOL / mature (per Altera product discontinuance notice) | — |
| Family | — | MAX 9000 |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Speed Grade | — | -15 (15 ns pin-to-pin) |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |