EPM9560RC208-7 vs EPM9560RC208-15 비교
다음의 상세 나란히 비교: EPM9560RC208-7 제조: Altera 및 EPM9560RC208-15 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM9560RC208-7 | EPM9560RC208-15 |
|---|---|---|
| 브랜드 | Altera | Altera |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | NRND | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $18.90 | $0.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EPLD / CPLD | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Usable Gates | 560 | 12,000 gates |
| Macrocells | 16 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/O Pins | 208 | — |
| Pin-to-Pin Delay (tPD) | 7 ns (speed grade -7) | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX value] | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| Supply Voltage (VCCIO) | 5.0 V (TTL) or 3.3 V (LVCMOS with level translator) | — |
| Process Technology | 0.65 um CMOS EEPROM | — |
| Configuration Memory | Non-volatile on-chip EEPROM (no boot PROM required) | — |
| Programming Interface | JTAG (IEEE 1149.1) + Altera ISP | — |
| 패키지 | 208-pin Power Quad Flat Pack (RQFP-208) | 208-pin RQFP (Power Quad Flat Pack) |
| 동작 온도 | 0C to +70C (commercial) / -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Output Drive Current | 160 mA DC sink per pin | — |
| RoHS 상태 | Compliant (ROHS3 per distributor listing) | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| 공급 전압 | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| 실장 유형 | — | Surface Mount |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Speed Grade | — | -15 (15 ns pin-to-pin) |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |