EPM9560RI208-20 vs EPM9560R1208-20 비교

다음의 상세 나란히 비교: EPM9560RI208-20 제조: Intel 및 EPM9560R1208-20 제조: Altera. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.

사양 비교

파라미터 EPM9560RI208-20 EPM9560R1208-20
브랜드 Intel Altera
카테고리 FPGA & CPLD FPGA & CPLD
수명 주기 상태 NRND Obsolete
재고 상태 In Stock In Stock
단가 (USD) $21.10 $22.40
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multiple Array MatriX (MAX) - third generation Multiple Array MatriX (MAX) with Logic Array Blocks (LABs) and Programmable Interconnect Array (PIA)
Usable Gates 12,000 6,000
Macro Cells 560 —
Logic Array Blocks (LABs) 16 —
Maximum User I/O Pins 212 —
Pin-to-Pin Propagation Delay (tPD) 20 ns —
Counter Frequency (fCNT) 100 MHz —
Supply Voltage (VCC) 5.0 V —
Process Technology CMOS EEPROM CMOS EEPROM, third-generation MAX architecture
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) Yes (IEEE 1149.1 JTAG)
패키지 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm R-1208 (BGA-style fine-pitch)
동작 온도 [DATA_NEEDED: operating temperature range grade] 0C to +70C (commercial)
RoHS 상태 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: confirm via current distributor data]
실장 유형 Surface Mount Surface Mount
Macrocells — 560
Logic Array Blocks — 52 (typical for 560 macrocells)
Maximum User I/O — 212
Propagation Delay (tPD) — 20 ns
Maximum Frequency (fMAX) — 125 MHz
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Technology — CMOS EEPROM
Boundary-Scan Test — JTAG IEEE Std. 1149.1
Configuration Memory — On-chip EEPROM (non-volatile)

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