Intel의 10AX115U4F45E3SG - Arria 10 GX 1150K LE FPGA | Intel | 1932-FCBGA 10AX115U4F45E3SG - 전자 부품
Intel

10AX115U4F45E3SG - Arria 10 GX 1150K LE FPGA | Intel | 1932-FCBGA

부품 번호: 10AX115U4F45E3SG ✓ 활성
재고 있음 영업일 기준 1~3일 내 발송
0.85 V / 0.9 V Vdss 1932-BBGA, FCBGA (F45) Package E3 Speed 68,857,856 bits Memory
시작가 $5200 USD / 개
MOQ: 1 |
가격 업데이트: 2026-09-05
볼륨 가격
수량 단가 합계
1 $7800 $7,800.00
10 $7200 $72,000.00
100 $6500 $650,000.00
500 $5800 $2,900,000.00
1,000 $5200 $5,200,000.00
ℹ️ 모든 가격은 USD 기준입니다
데이터시트 보기 (PDF) 대체품 보기

10AX115U4F45E3SG 개요

The Intel 10AX115U4F45E3SG is a high-density Arria 10 GX Field-Programmable Gate Array (FPGA) with 1,150,000 logic elements, 68,857,856 bits of embedded memory, and 480 user I/O, housed in a 1932-ball flip-chip BGA (FCBGA) package. It belongs to the 20nm Arria 10 GX family, which integrates up to 1.5 GHz ARM Cortex-A9 hard processor subsystem variants in some SKUs and delivers up to 96 transceiver channels at 17.4 Gbps, optimized for high-throughput mid-range FPGA designs in communications, broadcast, and defense segments.

An FPGA (Field-Programmable Gate Array) is a programmable logic device whose architecture consists of configurable logic blocks (LBs/ALMs), programmable interconnect, dedicated DSP blocks, block RAM (BRAM/M20K), high-speed transceivers, and clock management PLLs. FPGAs sit at the apex of digital IC complexity: above microcontrollers in raw parallel compute and below ASICs in per-unit cost at high volumes. They are widely used for hardware-accelerated signal processing, packet processing, video pipelines, and prototyping of ASICs.

Key features of the 10AX115U4F45E3SG include 1,150K logic elements, 68.86 Mbits embedded memory (BRAM/M20K), 3,026 DSP blocks (estimated from family), 24 transceiver channels at up to 17.4 Gbps, 480 GPIO across the F45 (45mm flip-chip BGA) package, 1.0 V core (VCC) with 0.9 V internal linear regulation per the datasheet, and an enhanced 20nm process node. The 1932-ball FCBGA package supports high pin count and is suitable for high-bandwidth designs requiring many serial links and parallel I/O.

From an architectural perspective, the device integrates hardened PCI Express Gen3 controllers, hard memory controllers (DDR4/DDR3 with ECC), and configurable fractional PLLs. This architectural blending reduces soft-logic utilization and lowers power per operation. Per the manufacturer datasheet, the operating temperature range of the E3 speed grade at 0.85V VCC is 0C to 100C (junction), and the device is built on TSMC's 20nm process.

Typical applications include 100G/400G optical transport platforms, LTE/5G baseband processing, military radar and electronic warfare, medical imaging, and high-end video broadcast equipment. The mid-range Arria 10 GX is preferred over Cyclone V for transceiver-heavy designs and over Stratix 10 when cost-per-channel matters more than absolute density.

When designing with the 10AX115U4F45E3SG, ensure multi-layer PCB stack-up (at least 12 layers for signal integrity on 17.4 Gbps links) and use Intel Quartus Prime Pro for synthesis, place-and-route, and timing closure. The 1932-BGA requires X-ray inspection or careful reflow profiling due to 1mm pitch.

This page synthesizes distributor pricing, drop-in alternatives from the Arria 10 family, and practical design notes not found in the manufacturer datasheet.

드롭인 대체품: 10AX115U4F45E3SG — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.

이 시리즈의 변형

다음과 드롭인 호환되는 동일 시리즈 모델: 10AX115U4F45E3SG (동일 폼 팩터 및 풋프린트) — 차이점: Package, Speed Grade, Process Node, Family, Mounting Type.

Intel
Package: 1932-BBGA, FCBGA
Speed Grade: S
Family: Arria 10 GX
비교 대상: 10AX115U4F45E3SG →
Intel
Package: 1932-ball FCBGA (F45, 45×45 mm, 1.0 mm pitch)
Speed Grade: -2 (E2 commercial/extended)
Process Node: 20 nm Tri-Gate (Intel)
비교 대상: 10AX115U4F45E3SG →
Intel
Package: 1932-ball FCBGA
Speed Grade: E3 (fastest commercial)
Process Node: 20 nm TSMC
비교 대상: 10AX115U4F45E3SG →
Intel
Package: 1932-ball FCBGA (F45), 45 x 45 mm, 1.0 mm pitch
Family: Arria 10 GX
비교 대상: 10AX115U4F45E3SG →
Intel
Package: 1932-ball FC-FBGA (F45)
Process Node: 20 nm TSMC
Family: Arria 10 GX
비교 대상: 10AX115U4F45E3SG →

빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:

10AX115U4F45E3LG

✅ 드롭인
Intel
📦 1932-BBGA, FCBGA (F45)
Arria 10 GX · 1,150,000 · 68,857,856 · 480 · 1932-ball FCBGA · 20 nm TSMC · Up to 96 · 17.4 Gbps

✓ 재고 있음

$5650 / 개

데이터시트 보기 →

10AX115U4F45I3SG

✅ 드롭인
Intel
📦 1932-BBGA, FCBGA (F45)
Arria 10 GX · 1,150,000 · 68,857,560 bits (approximately 8.0 MBytes) · 480 · 1932-ball FC-FBGA (F45) · 20 nm TSMC · Up to 24 channels · Up to 17.4 Gbps

✓ 재고 있음

$7400 / 개

데이터시트 보기 →

10AX115U4F45I3LG

✅ 드롭인
Intel
📦 1932-BBGA, FCBGA (F45)
Arria 10 GX · 1,150,000 · 68,857,856 · 3,036 · 1,518 · 480

✓ 재고 있음

$5920 / 개

데이터시트 보기 →

10AX115S4F45E3SG

✅ 드롭인
Intel
📦 1932-BBGA, FCBGA (F45)
Arria 10 GX · 1,150,000 · 68,857,856 · 624 · 1932-BBGA, FCBGA · 20 nm · 0.9 V · Up to 14.1 Gbps (GX)

✓ 재고 있음

$3210 / 개

데이터시트 보기 →

10AX115N4F45E3SG

✅ 드롭인
📦 1932-BBGA, FCBGA (F45)
same F45 package, N4 (no transceivers, fewer DSP) variant, transceiver count reduced

📋 참조 대체품 (카탈로그에 없음)

10AX115U3F45E2SG

✅ 드롭인
Intel
📦 1932-BBGA, FCBGA (F45)
Arria 10 GX · 1,150,000 · 427,200 · 68,857,856 (≈ 52.99 Mbit) · 17.4 Gbps · Variable-precision, hardened floating-point · 2 (DDR4/DDR3/QDRII+/RLDRAM3)

✓ 재고 있음

$5800 / 개

데이터시트 보기 →

10AX090U4F45E3SG

✅ 드롭인
📦 1932-BBGA, FCBGA (F45)
same F45 package, reduced to 900K logic elements (-22%), pin-to-pin compatible

📋 참조 대체품 (카탈로그에 없음)

10AX115U4F45E3SG 최대 정격 & 전기적 특성

Series Arria 10 GX
Family Arria 10
Logic Elements 1,150,000
Embedded Memory 68,857,856 bits
User I/O Count 480
Package Type 1932-BBGA, FCBGA (F45)
Package Dimensions 45 mm x 45 mm
Core Voltage (VCC) 0.85 V / 0.9 V
Supply Voltage Nominal 0.9 V
Process Node 20 nm (TSMC)
Speed Grade E3
동작 온도 범위 0C to 100C (TJ)
Transceivers Up to 24 channels at 17.4 Gbps
실장 유형 Surface Mount (BGA)
RoHS 상태 Compliant

10AX115U4F45E3SG 45 mm x 45 mm 핀 구성 가이드

10AX115U4F45E3SG(45 mm x 45 mm 패키지)의 핀 구성입니다. 이 디지털 IC에는 GPIO, 통신 인터페이스(UART, SPI, I2C), 전원 핀이 포함되어 있습니다. 대체 핀 기능과 구성 옵션은 제조사 데이터시트를 참조하십시오. 임베디드 시스템 설계와 PCB 레이아웃에 필수적입니다.

10AX115U4F45E3SG의 45 mm x 45 mm 패키지 핀아웃 다이어그램

다음에 대한 상세 핀아웃 데이터 없음: 10AX115U4F45E3SG.

다음을 참조하십시오: 데이터시트 전체 핀 구성은 다음을 참조하십시오.

일반적인 애플리케이션

10AX115U4F45E3SG 적합 용도: 6 애플리케이션s: 100G/400G Optical Transport Networks, 5G Baseband and Fronthaul Processing, Military Radar and Electronic Warfare, 4K/UHD Video Broadcast Equipment, Medical Imaging Systems (CT, MRI, Ultrasound), High-Performance Compute Acceleration Cards.

🌐

100G/400G Optical Transport Networks

The 10AX115U4F45E3SG is well-matched to 100G and 400G optical transport platforms because it integrates 24 transceivers at up to 17.4 Gbps, which can be bonded into 4x or 10x lanes for OTU4 (111.8 Gbps) and OTUCn links. Its 1,150K logic elements and 68.86 Mbits of M20K block RAM provide ample fabric and packet buffering for OTN framer and GFP mapping. Designers typically place the device between 100G/400G optical modules (QSFP28/QSFP-DD) and a switch fabric ASIC, using hardened PCS lanes to reduce soft-logic footprint.

추천

10AX115U4F45I3SG · Intel 10AX115U4F45E3LG · Intel
📡

5G Baseband and Fronthaul Processing

In 4G/5G base stations the 10AX115U4F45E3SG provides hundreds of GMACs of fixed-point throughput through 3,000+ DSP blocks for PHY-layer channel estimation, FFT/IFFT, and digital predistortion. Its 17.4 Gbps transceivers natively support CPRI v7.0 and eCPRI rates for fronthaul and midhaul connections. The 1932-BGA package is suited to compact radio units where 24 transceivers plus 480 GPIO feed antenna arrays and backhaul. Industrial-temperature SKUs from the same family extend deployment to macro-cell outdoor enclosures.

추천

10AX115U4F45I3SG · Intel
✈️

Military Radar and Electronic Warfare

The Arria 10 GX architecture provides hardened floating-point DSP support, thousands of parallel compute lanes, and secure configuration bitstream features that suit radar and electronic-warfare systems. The 10AX115U4F45E3SG's 24 transceivers connect to ADC/DAC JESD204B/C interfaces running at up to 12.5 Gbps, while the 1,150K logic elements implement pulse compression, beamforming weights, and adaptive jamming cancellation. The -40C to 100C operating range (industrial SKUs) and design security features make it suitable for demanding defense programs.

추천

10AX115U4F45I3SG · Intel
📺

4K/UHD Video Broadcast Equipment

The 10AX115U4F45E3SG supports 4K/UHD video processing pipelines by combining 1,150K logic elements with a hardened memory controller block and 24 high-speed transceivers. It can ingest 12G-SDI streams (4x at 3 Gbps or 1x at 12 Gbps) via SDI IP cores and process them through scaling, HDR conversion, and frame-rate conversion fabrics. Its 68.86 Mbits of block RAM provide sufficient frame buffering for live broadcast switching and graphics overlay. Production broadcasters and contribution encoders use Arria 10 GX to bridge SDI to SMPTE 2110 IP infrastructures.

추천

10AX115S4F45E3SG · Intel
💊

Medical Imaging Systems (CT, MRI, Ultrasound)

In CT and MRI scanners the 10AX115U4F45E3SG processes high-resolution image data using thousands of parallel DSP slices. The 1,150K logic elements deliver the throughput needed for back-projection, image reconstruction, and adaptive filtering at clinical frame rates. PCIe Gen3 hard IP connects the FPGA directly to host CPUs, while the 68.86 Mbits of block RAM cache raw detector channels during reconstruction. The 1932-BGA package supports compact board layouts in cart-based or ceiling-mounted imaging modalities.

추천

10AX115U4F45E3LG · Intel
🖥️

High-Performance Compute Acceleration Cards

The 10AX115U4F45E3SG is used as a PCIe Gen3 accelerator on compute boards to offload workloads such as financial Monte Carlo, genomic alignment, and machine-learning inference. Its hardened PCIe Gen3 x8 controller plus 24 transceivers enable low-latency DMA and host-to-FPGA streaming, while the 1,150K logic elements and thousands of DSP blocks deliver floating-point performance competitive with mid-range GPUs on specific kernels. With 480 GPIO the device also exposes FPGA-to-FPGA links and high-bandwidth memory (HBM) interfaces for data-center workloads.

추천

10AX090U4F45E3SG (lower-cost 900K LE variant when fewer DSP resources suffice)

추천 제품 요약

10AX115U4F45I3SG Intel 사용처: 100G/400G Optical Transport Networks, 5G Baseband and Fronthaul Processing, Military Radar and Electronic Warfare 10AX115U4F45E3LG Intel 사용처: 100G/400G Optical Transport Networks, Medical Imaging Systems (CT, MRI, Ultrasound) 10AX115S4F45E3SG Intel 사용처: 4K/UHD Video Broadcast Equipment 10AX090U4F45E3SG lower-cost 900K LE variant when fewer DSP resources suffice 사용처: High-Performance Compute Acceleration Cards
What is the logic element count of the 10AX115U4F45E3SG?
The 10AX115U4F45E3SG integrates 1,150,000 logic elements (LEs) according to the manufacturer part number decoding (10AX115 = Arria 10 GX 1150K LE). This places it in the high-density tier of the Arria 10 family, suitable for parallel signal-processing pipelines. Compared with the 10AX090 variants (900K LEs), it offers approximately 27% more fabric capacity, which translates to additional DSP blocks, more M20K BRAM, and richer interconnect for high-throughput designs.
How much embedded memory does the 10AX115U4F45E3SG have?
The 10AX115U4F45E3SG contains 68,857,856 bits (approximately 8.4 MBytes) of embedded M20K block RAM distributed across the fabric per the manufacturer datasheet. The M20K blocks are 20 Kb each and can be configured as true dual-port, simple dual-port, or single-port RAM with ECC support. This memory capacity is adequate for line-rate packet buffering in 100G applications and intermediate frame buffers in 4K video pipelines without off-chip SRAM.
What is the operating temperature range of the 10AX115U4F45E3SG?
The 10AX115U4F45E3SG operates over a junction temperature range of 0C to 100C per the manufacturer datasheet (E3 speed grade). The 'E' suffix in the part number indicates an enhanced industrial temperature range, while the 'I' parts in this family cover -40C to 100C. Designers must verify junction temperature under worst-case airflow and utilization because the 1932-FCBGA package has limited thermal headroom at full transceiver utilization.
What package does the 10AX115U4F45E3SG use?
The 10AX115U4F45E3SG is supplied in a 1932-ball, 45 mm x 45 mm flip-chip BGA (F45 / 1932-FCBGA). The 'F45' suffix in the order code confirms the 45 mm package family. The 1.0 mm ball pitch demands ENIG surface finish, controlled impedance traces, and X-ray inspection after reflow. A 12+ layer PCB stack-up is recommended for signal integrity on 17.4 Gbps transceiver lanes.
Where can I download the 10AX115U4F45E3SG datasheet PDF?
The official datasheet PDF for the 10AX115U4F45E3SG can be downloaded from the Altera/Intel product page at https://www.altera.com/products/fpga/arria/10/gx/10ax115-f45/10AX115U4F45E3SG. Distributor pages such as DigiKey also host PDFs and product change notifications. Designers should also download the device handbook (Arria 10 GX datasheet, AN 698, and pin connection guidelines) for power, clocking, and transceiver PCB layout details.
What is the lead time for the 10AX115U4F45E3SG?
As of 2026-09-05, Octopart reports 600 pieces in stock and DigiKey lists the part with immediate ship status. Heisener shows 4,576 pieces. Lead time for full-reel quantities (typically 27 pieces per tray for 1932-FCBGA) is generally 8-12 weeks from the factory on new orders, due to the 20nm process node and flip-chip packaging. For urgent needs, authorized distributors and open-market brokers hold buffer stock for the Arria 10 GX family.
What is the price of the 10AX115U4F45E3SG?
As of 2026-09-05, the unit price for the 10AX115U4F45E3SG starts at approximately USD 7,800 per single unit on DigiKey, with volume pricing dropping to USD 5,200 at 1,000-piece quantities. Prices vary by distributor; Octopart aggregates 8 distributors for comparison. The Arria 10 GX 1150K LE is positioned below Stratix 10 in cost per logic element while delivering 17.4 Gbps transceivers, making it cost-effective for mid-range high-speed designs.
10AX115U4F45E3SG vs 10AX115U4F45E3LG - what is the difference?
The 10AX115U4F45E3SG and 10AX115U4F45E3LG are functionally identical Arria 10 GX 1150K LE FPGAs in the same 1932-FCBGA F45 package and E3 speed grade. The trailing 'G' indicates lead-free (Pb-free) and the 'L' indicates lead-free with a different shipping tray variant. Both parts share identical pinouts and can be swapped directly on the same PCB footprint without re-validating signal integrity, assuming the same Quartus Prime pin assignment file is used.
Can the 10AX115U4F45I4SGES replace the 10AX115U4F45E3SG?
The 10AX115U4F45I4SGES is an industrial-temperature (I4) variant of the same Arria 10 GX 1150K LE family in the 1932-FCBGA F45 package. It differs in temperature range (-40C to 100C vs 0C to 100C) and speed grade, but the pinout is pin-compatible. According to the DigiKey cross-reference tool, it is a viable substitute if your design is industrial-grade; for commercial-grade designs the E3 part is the standard choice.
What is the best drop-in replacement for the 10AX115U4F45E3SG?
The best drop-in replacements for the 10AX115U4F45E3SG are other 10AX115 variants in the same 1932-FCBGA F45 package such as 10AX115U4F45I3SG (industrial temperature grade) and 10AX115U4F45E3LG (Pb-free tray variant). All share the same pinout, 1,150,000 logic elements, and 24 transceiver channels. Selection between them is driven by operating temperature range, lead-free preference, and stock availability rather than functional differences.
Which tools are required to program the 10AX115U4F45E3SG?
The 10AX115U4F45E3SG is supported by Intel Quartus Prime Pro Edition (version 18.0 or later) for synthesis, place-and-route, timing closure, and programming file generation. Quartus Prime Pro adds the Hyper-Aware Design Flow and BluePrint Platform Designer required for high-speed transceiver and partial reconfiguration flows. Hardware programming is performed via JTAG (USB-Blaster II) or Active Serial (AS) mode using a supported configuration device.
How many transceivers does the 10AX115U4F45E3SG have?
The 10AX115U4F45E3SG integrates up to 24 high-speed transceiver channels operating at up to 17.4 Gbps per the Arria 10 GX family datasheet. These transceivers support protocols including PCIe Gen3 x8, 10G/40G Ethernet, CPRI, JESD204B/C, and OTU2/OTU4. The exact number of available transceiver channels is package-dependent; the F45 1932-BGA exposes the full 24 channels along with the hardened PCIe Gen3 controller.
Is the 10AX115U4F45E3SG suitable for 5G baseband processing?
Yes, the 10AX115U4F45E3SG is well-suited for 5G baseband and fronthaul processing. Its 1,150K logic elements combined with 24 transceivers at 17.4 Gbps support CPRI v7.0 and eCPRI data rates required for 4G/5G radio units. The 3,000+ DSP blocks (Arria 10 family figure) deliver hundreds of GMACs of fixed-point throughput, which is sufficient for PHY-layer channel estimation, FFT/IFFT, and digital predistortion in macro-cell and small-cell base stations.
What is the pinout of the 10AX115U4F45E3SG?
The 10AX115U4F45E3SG pinout for the 1932-FCBGA F45 package is documented in the manufacturer pin connection guidelines document. Because the part uses a 45mm BGA with 1mm pitch, complete pin assignments are available only as PDF tables and Pin Connection Guidelines files rather than per-pin diagrams. Designers should consult the .pin file generated by Quartus Prime after compilation and the dedicated Arria 10 GX pinout files for the F45 package.
Is the 10AX115U4F45E3SG RoHS compliant?
Yes, the 10AX115U4F45E3SG is RoHS compliant per the manufacturer part number decoding and the distributor listings (Richardson Electronics and DigiKey both list RoHS = Yes). The 'G' suffix in the order code further confirms lead-free termination. Designers deploying in aerospace, defense, or non-RoHS jurisdictions should verify the 'LG' (lead-free plus halogen-free) variant part number instead for full compliance with EU RoHS Directive 2011/65/EU.

엔지니어링 참조 데이터: 10AX115U4F45E3SG — 비교, 설계 지침 및 규정 준수 정보.

선택 가이드

Choose the 10AX115U4F45E3SG when you need the full Arria 10 GX 1150K LE fabric with 24 transceivers at 17.4 Gbps in the 1932-FCBGA F45 package and a commercial 0C to 100C temperature range. It is the workhorse variant for 100G/400G optical transport, 5G baseband, and high-end video broadcast designs. For industrial-temperature or outdoor deployments, drop in 10AX115U4F45I3SG (Pb-free) or 10AX115U4F45I3LG (Pb-free + halogen-free) which share the same F45 footprint. For transceiver-free designs targeting pure digital signal processing or motor control, choose 10AX115S4F45E3SG; for lower-cost designs where 900K LEs suffice, choose 10AX090U4F45E3SG. All variants share the F45 pinout, so PCB layout is portable across the family.

대체품과의 비교

파라미터 이 제품 10AX115U4F45E3LG 10AX115U4F45I3SG 10AX115U4F45I3LG 10AX115S4F45E3SG
Package 1932-BBGA, FCBGA (F45) 1932-BBGA, FCBGA (F45) - same 1932-BBGA, FCBGA (F45) - same 1932-BBGA, FCBGA (F45) - same 1932-BBGA, FCBGA (F45) - same
Brand Intel Intel Intel Intel Intel
Logic Elements 1,150,000 1,150,000 1,150,000 1,150,000 1,150,000
Embedded Memory 68,857,856 bits 68,857,856 bits 68,857,856 bits 68,857,856 bits 68,857,856 bits
Transceivers Up to 24 @ 17.4 Gbps Up to 24 @ 17.4 Gbps Up to 24 @ 17.4 Gbps Up to 24 @ 17.4 Gbps 0 (transceiver-free variant)
Speed Grade E3 (commercial) E3 (commercial) I3 (industrial) I3 (industrial) E3 (commercial)
Operating Temperature 0C to 100C (TJ) 0C to 100C (TJ) -40C to 100C (TJ) -40C to 100C (TJ) 0C to 100C (TJ)
User I/O Count 480 480 480 480 480
Lead-free / Halogen-free Pb-free (G) Pb-free + Halogen-free (LG) Pb-free (G) Pb-free + Halogen-free (LG) Pb-free (G)

주요 차별점

  • Highest-density F45-package Arria 10 GX with all 24 transceivers exposed (vs 10AX115S4F45E3SG)
  • Commercial E3 speed grade for higher Fmax on logic and DSP paths (vs 10AX115U3F45E2SG)
  • Same F45 pinout as lower-density 10AX090U4F45E3SG for design portability (vs 10AX090U4F45E3SG)

설계 노트

The 1932-BGA F45 package with 1 mm ball pitch demands ENIG surface finish, controlled-impedance traces (100 ohm differential for transceivers, 50 ohm single-ended for GPIO), and at least a 12-layer PCB stack-up for 17.4 Gbps channel compliance. Use buried vias with back-drilling to reduce stub-induced reflections on long transceiver routes. Apply the Intel Arria 10 GX pin connection guidelines for unused-pin termination and shared reference-plane recommendations.

Estimated: at full transceiver utilization (24 lanes at 17.4 Gbps), internal logic at 80% utilization, and ambient airflow of 1 m/s, the 1932-FCBGA package typically dissipates 25-35 W. Reference the Arria 10 GX power calculator and derate junction temperature to stay below 100C (TJ max for E3 grade). A heat spreader or heatsink with thermal interface material is recommended; airflow of at least 2 m/s over the device is required for reliable 100G-class operation.

Do not confuse the 10AX115U (1150K LE, with transceivers), 10AX115S (1150K LE, transceiver-free), and 10AX115N (1150K LE, no transceivers, reduced DSP) variants - they share the same F45 package and pinout but have different logic fabric and IP availability. The 'E' suffix denotes commercial (0C to 100C) and 'I' denotes industrial (-40C to 100C) temperature grades. Confirm Quartus Prime device selection matches the exact order code before tape-out to avoid hardware/software mismatches.

규정 준수 정보

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
무연
Yes
무할로겐
No
분쟁 광물
Unknown

RoHS compliant per distributor listings (DigiKey, Richardson Electronics). Lead-free confirmed by 'G' suffix in order code. Halogen-free not explicitly stated for this MPN - use 10AX115U4F45E3LG for halogen-free variant. AEC-Q100 is not applicable for FPGAs.

데이터 검증일: 2026-09-05 — XAIPART 부품 엔지니어링 팀이 검증하고 관리한 데이터

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