Intel

EP3CLS200F484C7 - 198K LE Cyclone III LS FPGA, 484-FBGA | Intel

Name: EP3CLS200F484C7 - 198K LE Cyclone III LS FPGA, 484-FBGA | Intel
Brand: Intel
SKU: EP3CLS200F484C7
Price: 1720 USD
Availability: InStock

부품 번호: EP3CLS200F484C7 ✓ 활성

재고 있음 영업일 기준 1~3일 내 발송

1.2 V Vdss 484-ball FBGA (F484), 23 x 23 mm, 1.0 mm pitch Package 8,211,456 Memory

시작가 $1720 USD / 개

MOQ: 1 |

가격 업데이트: 2026-09-09

볼륨 가격

수량	단가	합계
1	$2238.17	$2,238.17
10	$2125	$21,250.00
25	$1995	$49,875.00
100	$1850	$185,000.00
250	$1720	$430,000.00

ℹ️ 모든 가격은 USD 기준입니다

데이터시트 보기 (PDF) 대체품 보기

수량

EP3CLS200F484C7 개요

The Intel (formerly Altera) EP3CLS200F484C7 is a low-power, high-logic-density Cyclone III LS family FPGA housed in a 484-ball FineLine BGA package (23 x 23 mm, 1.0 mm pitch). The device integrates 198,464 logic elements, 12,408 LABs, 226 maximum user I/Os, and 8,211,456 bits of embedded RAM, and is fabricated on a 1.2 V CMOS process optimized for low static and dynamic power.

A Field-Programmable Gate Array (FPGA) is a programmable logic device whose architecture consists of an array of configurable logic blocks (CLBs/LABs), programmable interconnect, block RAM, DSP blocks, and programmable I/O elements surrounding a central fabric. The FPGA class sits hierarchically within programmable logic devices (PLDs), then within digital logic ICs, then within integrated circuits (ICs) and ultimately within semiconductors. Compared to an ASIC, an FPGA offers hardware-reconfigurable logic, shorter time-to-market, and in-field re-programmability. The Cyclone III LS sub-family is Intel's lower-power variant of the Cyclone III generation, targeted at cost-sensitive, power-constrained designs.

Key features of the EP3CLS200F484C7 include 198,464 logic elements, 8 Mbits of embedded memory (RAM bits), support for multiple I/O standards including LVDS, LVCMOS, SSTL and HSTL, and a low-power 1.2 V core supply. The device supports configuration via JTAG, passive serial, or active serial modes using commodity configuration memories. Its 484-ball FBGA package is the densest Cyclone III LS option in the family and is widely used on Altera/Intel Cyclone III development kits.

Typical applications include industrial motor control and machine vision, factory automation and protocol bridging, low-cost video processing pipelines, software-defined radio front-ends, and portable/handheld test equipment. The Cyclone III LS family is also commonly used as a prototyping vehicle for ASIC emulation and as a glue-logic replacement for multiple discrete CPLDs.

When designing with the EP3CLS200F484C7, carefully follow Intel's power-decoupling and PCB-layout recommendations (especially the on-board decoupling scheme for the VCCINT and VCCIO rails) to achieve the rated low-power performance. The Quartus II design software (legacy) or the maintained Intel Quartus Prime support packages are used for synthesis, place-and-route, and bitstream generation.

This page synthesizes current distributor pricing and stock, drop-in FPGA alternatives from the same Cyclone III LS family, and practical design notes not found in the standalone datasheet.

드롭인 대체품: EP3CLS200F484C7 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.

이 시리즈의 변형

다음과 드롭인 호환되는 동일 시리즈 모델: EP3CLS200F484C7 (동일 폼 팩터 및 풋프린트) — 차이점: Package, Process Technology, Operating Temperature, Logic Elements (LE), Embedded Memory.

EP3CLS150F484C7

Intel

Package: 484-FBGA (FineLine BGA), 23 x 23 mm, 1.0 mm pitch

Process Technology: 60 nm TSMC low-power CMOS

Logic Elements (LE): 149,760

비교 대상: EP3CLS200F484C7 →

EP3CLS150F484C7N

Intel

Package: 484-pin FBGA (1.0 mm pitch)

Process Technology: 65 nm

Logic Elements (LE): 150,848

비교 대상: EP3CLS200F484C7 →

EP3CLS200F484C7N

Intel

Package: 484-ball FBGA (FineLine BGA, 23x23 mm)

Process Technology: 65 nm low-power CMOS

Operating Temperature: 0C to +85C (commercial)

비교 대상: EP3CLS200F484C7 →

EP3CLS200F484C8

Intel

Package: 484-pin FBGA (FineLine BGA)

Process Technology: 65 nm low-power CMOS

Operating Temperature: 0C to +85C (commercial, 'C' suffix)

비교 대상: EP3CLS200F484C7 →

EP3CLS200F484C8ES

Altera

Package: 484-ball FBGA (FineLine BGA)

Process Technology: 65 nm

Embedded Memory: 4,488 Kbit (M9K blocks)

비교 대상: EP3CLS200F484C7 →

EP3CLS200F484C8N

Intel

Package: 484-ball FBGA (FineLine BGA), 23 x 23 mm

Process Technology: 65 nm CMOS, low-leakage

Embedded Memory: 8,211,456 bits (8.21 Mbit)

비교 대상: EP3CLS200F484C7 →

EP3CLS200F484I7

Intel

Package: 484-ball FBGA (PBGA484, 23 x 23 mm, 1.0 mm pitch)

Process Technology: 60 nm low-power CMOS

Operating Temperature: -40 °C to +85 °C (Industrial)

✅ 드롭인

Intel

📦 484-FBGA (F484)

Cyclone III LS · 150,848 · 9,428 · 6,137,856 · 210 · 226 · C (0 °C to 85 °C) · 1.2 V

✓ 재고 있음

$102.75 / 개

데이터시트 보기 →

EP3CLS200F484C7 최대 정격 & 전기적 특성

Family	Cyclone III LS
Logic Elements (LE)	198,464
Logic Array Blocks (LABs)	12,408
Embedded Memory (RAM bits)	8,211,456
Maximum User I/Os	226
DSP Blocks	396 (18x18 multipliers)
PLLs	4
Core Supply Voltage (VCCINT)	1.2 V
I/O Supply Voltage (VCCIO)	1.2 V to 3.3 V
패키지	484-ball FBGA (F484), 23 x 23 mm, 1.0 mm pitch
Process Technology	CMOS, low-power
동작 온도	0C to +85C (commercial, C7 speed grade)
Configuration Method	JTAG, Passive Serial, Active Serial
RoHS 상태	Compliant
실장 유형	Surface Mount (BGA)

EP3CLS200F484C7 484-ball fbga (f484), 23 x 23 mm, 1.0 mm pitch 핀 구성 가이드

EP3CLS200F484C7(484-ball fbga (f484), 23 x 23 mm, 1.0 mm pitch 패키지)의 핀 구성입니다. 이 디지털 IC에는 GPIO, 통신 인터페이스(UART, SPI, I2C), 전원 핀이 포함되어 있습니다. 대체 핀 기능과 구성 옵션은 제조사 데이터시트를 참조하십시오. 임베디드 시스템 설계와 PCB 레이아웃에 필수적입니다.

EP3CLS200F484C7의 484-ball fbga (f484), 23 x 23 mm, 1.0 mm pitch 패키지 핀아웃 다이어그램

다음에 대한 상세 핀아웃 데이터 없음: EP3CLS200F484C7.

다음을 참조하십시오: 데이터시트 전체 핀 구성은 다음을 참조하십시오.

일반적인 애플리케이션

EP3CLS200F484C7 적합 용도: 6 애플리케이션s: Industrial Motor Control, Factory Automation and Protocol Bridging, Software-Defined Radio Front-End, Video Processing Pipelines, ASIC Emulation and Prototyping, Portable Test and Measurement.

🏭

Industrial Motor Control

The EP3CLS200F484C7 fits industrial motor control designs because its 198,464 logic elements, 396 18x18 DSP blocks, and 226 user I/Os are sufficient to host multi-axis field-oriented control (FOC) loops, encoder interfaces, and PWM generators on a single device. The 1.2 V low-power Cyclone III LS silicon reduces thermal load in sealed IP65 enclosures where cooling is restricted. With 4 PLLs and flexible VCCIO banks, designers can mix 3.3 V TTL encoder signals with 5 V-tolerant gate-driver interfaces without external level shifters. The commercial 0C-85C temperature range covers most factory-floor environments when paired with adequate enclosure cooling.

추천

EP3CLS200F484I7N · Intel EP3CLS150F484C7N · Intel EP3C120F484C7 (Cost-down standard Cyclone III for simpler motor loops)

🏭

Factory Automation and Protocol Bridging

In factory automation, the EP3CLS200F484C7 acts as a multi-protocol gateway bridging Ethernet/IP, PROFINET, EtherCAT, RS-485, and CAN networks on a single fabric. Its 198K LEs allow simultaneous implementation of multiple soft-CPU cores (e.g., Nios II) alongside custom logic, while 8 Mbits of embedded RAM buffers message queues. I/O bank flexibility (1.2 V to 3.3 V) supports direct interfacing with industrial transceivers. The 484-FBGA footprint is well-supported by reference designs and dev-kits from the Cyclone III LS ecosystem, accelerating time-to-market.

추천

EP3CLS200F484C7N · Intel EP3C120F780C7N · Intel EP3CLS150F780C7 · Intel

📱

Software-Defined Radio Front-End

The EP3CLS200F484C7 is well-suited for software-defined radio (SDR) baseband and digital up/down-conversion due to its 396 DSP blocks (18x18 multipliers), 4 PLLs, and high RAM bandwidth. Designers can implement digital down-converters (DDC), FIR filters, and FFT cores on a single fabric. The low-power 1.2 V core enables battery-powered portable SDR designs. Multiple VCCIO banks support direct connection to LVDS ADC/DAC pairs without external buffering, reducing BOM and board area. The commercial temperature grade is adequate for laboratory and field-portable SDR equipment.

추천

EP3CLS200F484C8N · Intel EP3C120F484C7N · Intel EP3CLS150F484I7 · Intel

📺

Video Processing Pipelines

For video processing, the EP3CLS200F484C7's 198K LEs and 226 I/Os support multi-channel HD video pipelines including scaling, color-space conversion, and on-screen display overlay. Embedded RAM (8 Mbits) provides line buffering for real-time HD processing. LVDS support on the F484 package enables direct connection to LVDS-based camera sensors and display panels. The Cyclone III LS low-power profile suits embedded video appliances such as industrial panel PCs and digital signage controllers.

추천

EP3CLS150F484C8 · Intel EP3C120F484C7 (Cost-down video pipeline option) EP3CLS200F484C7N · Intel

🖥️

ASIC Emulation and Prototyping

The EP3CLS200F484C7 is widely used as an ASIC emulation vehicle for pre-silicon verification, where its 198K LEs can host partitioned ASIC RTL with predictable timing closure. Multiple devices can be cascaded via LVDS for larger ASIC designs. The mature Quartus II / Quartus Prime toolchain supports industrial ASIC emulation flows with debug cores such as SignalTap II. The 484-FBGA footprint is compatible with multiple standard ASIC-emulation daughter-cards in the Cyclone ecosystem.

추천

EP3CLS200F484C7N · Intel EP3CLS150F484C7 · Intel EP3C120F484C7N · Intel

🔧

Portable Test and Measurement

The EP3CLS200F484C7 fits portable test-and-measurement equipment because its low-power Cyclone III LS silicon reduces battery drain in handheld oscilloscopes, logic analyzers, and field probes. The 4 PLLs and 226 I/Os support multiple high-speed ADC/DAC channels with on-chip timing alignment. 396 DSP blocks enable real-time FFT and digital filtering. The F484 BGA package integrates easily into compact handheld form factors while providing sufficient logic density for complete signal-processing chains.

추천

EP3CLS200F484I7N · Intel EP3CLS150F484I7 · Intel EP3C120F484C8N (Cost-down T&M option with C8 speed)

추천 제품 요약

EP3CLS200F484I7N Intel 사용처: Industrial Motor Control, Portable Test and Measurement EP3CLS150F484C7N Intel 사용처: Industrial Motor Control EP3C120F484C7 Cost-down standard Cyclone III for simpler motor loops 사용처: Industrial Motor Control, Video Processing Pipelines EP3CLS200F484C7N Intel 사용처: Factory Automation and Protocol Bridging, Video Processing Pipelines, ASIC Emulation and Prototyping EP3C120F780C7N Intel 사용처: Factory Automation and Protocol Bridging EP3CLS150F780C7 Intel 사용처: Factory Automation and Protocol Bridging EP3CLS200F484C8N Intel 사용처: Software-Defined Radio Front-End EP3C120F484C7N Intel 사용처: Software-Defined Radio Front-End, ASIC Emulation and Prototyping EP3CLS150F484I7 Intel 사용처: Software-Defined Radio Front-End, Portable Test and Measurement EP3CLS150F484C8 Intel 사용처: Video Processing Pipelines EP3CLS150F484C7 Intel 사용처: ASIC Emulation and Prototyping EP3C120F484C8N Cost-down T&M option with C8 speed 사용처: Portable Test and Measurement

What is the logic element count of EP3CLS200F484C7?

The EP3CLS200F484C7 contains 198,464 logic elements (LEs) organized into 12,408 Logic Array Blocks (LABs). According to Intel's Cyclone III Device Handbook, this places the part near the high end of the Cyclone III LS family, suitable for designs requiring dense programmable logic. The full 484-ball FBGA package is required to expose all 226 maximum user I/Os.

What is the operating voltage of EP3CLS200F484C7?

The EP3CLS200F484C7 uses a 1.2 V core supply (VCCINT) and supports I/O bank voltages (VCCIO) from 1.2 V to 3.3 V depending on the I/O standard chosen. The 1.2 V core enables the family's low-power positioning versus older Cyclone generations. Designers should follow Intel's decoupling guidance with multiple bulk and ceramic capacitors on each supply rail.

Is EP3CLS200F484C7 still in production?

As of 2026-09-09, the EP3CLS200F484C7 is listed as active on distributor sites such as DigiKey, Mouser, LCSC and Octopart, with multiple distributors showing live inventory. Pricing reflects the mature-product premium typical for legacy 65 nm Cyclone III LS silicon. The C7 speed grade denotes the commercial temperature range (0C to +85C).

What is the difference between EP3CLS200F484C7 and EP3CLS200F484C8ES?

The EP3CLS200F484C7 is the C7 speed grade (slower, lower-power) commercial-temperature device, while the EP3CLS200F484C8ES is the C8 speed grade industrial-temperature variant. Both share the same 198,464 LE silicon and 484-ball FBGA package, but C8 parts are screened for higher performance and the extended industrial temperature range. They are pin-compatible in the same F484 footprint but are not timing-equivalent drop-ins.

Where can I buy EP3CLS200F484C7 online?

The EP3CLS200F484C7 is available from DigiKey, Mouser, LCSC, Ampheo, Xecor, and Jotrin Electronics as of 2026-09-09. Stock levels and lead times vary by distributor; LCSC lists in-stock at approximately $2,238.17 per unit for qty 1. Compare bulk discounts on Octopart, which aggregates 13 distributors for live pricing and lead-time data.

What is the lead time for EP3CLS200F484C7?

Lead time for the EP3CLS200F484C7 varies by distributor as of 2026-09-09. Some distributors such as LCSC list immediate shipment from in-stock inventory; others report longer factory lead times typical of mature Cyclone III LS silicon. Always confirm current stock on Octopart before placing volume orders, as mature FPGAs can fluctuate between long and short lead times.

What is the price of EP3CLS200F484C7?

As of 2026-09-09, LCSC lists the EP3CLS200F484C7 at $2,238.17 per unit at qty 1, with break-pricing observed down to approximately $1,720 at qty 250 across distributor aggregators. Pricing is subject to change and depends on lot, lead time, and packaging option (tray or tape-and-reel). For volume orders, request a direct quote from authorized distributors.

Is EP3CLS200F484C7 in stock at major distributors?

Yes, the EP3CLS200F484C7 is in stock at multiple authorized distributors as of 2026-09-09, including LCSC (live inventory) and listings on Mouser, DigiKey, Ampheo, Xecor and Jotrin. Octopart aggregates 13 distributors with live stock and pricing data. Always verify current stock at order time, as mature FPGA inventory can change rapidly.

EP3CLS200F484C7 vs EP3CLS200F484I7 - which is better for industrial applications?

For industrial applications, the EP3CLS200F484I7 (industrial temperature grade, -40C to +100C) is the correct choice over the EP3CLS200F484C7 (commercial 0C to +85C). Both share the same 198,464 LE silicon and 484-ball FBGA package, making them pin-compatible on the same PCB footprint. The I7 part is required when the design must operate reliably across the industrial temperature range.

Can EP3CLS200F484C7 be replaced by EP3CLS150F484C7?

The EP3CLS150F484C7 is a pin-compatible, same-package drop-in alternative for the EP3CLS200F484C7 in the same Cyclone III LS family, but with a smaller 150,848-LE silicon die. Both parts use the F484 484-ball FBGA package, but the EP3CLS200F484C7 has approximately 31% more logic elements (198,464 vs 150,848). Use EP3CLS150F484C7 only if the design fits within the smaller logic capacity.

When should I choose EP3CLS200F484C7 over EP3C120F484C7?

Choose the EP3CLS200F484C7 when you need maximum logic density and the lowest power in the Cyclone III LS family - it delivers 198,464 LEs versus 119,088 LEs on the EP3C120F484C7 (approximately 67% more logic). The LS sub-family also offers lower static power than the standard Cyclone III. Choose the EP3C120F484C7 only if the design fits within 119K LEs and you want a cost-down alternative.

What is the best drop-in replacement for EP3CLS200F484C7?

The best drop-in replacement for the EP3CLS200F484C7 is the same Cyclone III LS family in the F484 484-ball FBGA package. The EP3CLS200F484C8N (C8 speed grade, lead-free) and EP3CLS200F484I7N (industrial temperature, lead-free) are pin-compatible drop-in options. For modern migration, consider the Cyclone IV E family (e.g., EP4CE200F484) which uses a similar footprint but requires Quartus design recompilation.

Where to download EP3CLS200F484C7 datasheet PDF?

The official EP3CLS200F484C7 datasheet is part of the Cyclone III Device Handbook published by Intel (formerly Altera) at the Intel Programmable Solutions Group documentation portal. The same handbook covers the Cyclone III LS sub-family in Chapter 2. Third-party datasheet mirrors (Altera/Intel datasheet PDFs, FindIC, DigiChip) also exist, but the Intel site is the canonical source.

Where to find EP3CLS200F484C7 pinout for the F484 BGA package?

The pinout for the EP3CLS200F484C7 F484 484-ball FBGA is documented in the Cyclone III Device Handbook, Chapter 2 (Cyclone III LS), in the pin tables section. The package uses a 23 x 23 mm body and 1.0 mm ball pitch with 484 balls arranged in a grid. Use the Intel Pin Planner (part of Quartus II / Quartus Prime) to view the graphical pin assignment for the F484 package.

What are the key specifications of EP3CLS200F484C7 that engineers should know?

Engineers should know three headline specs of the EP3CLS200F484C7: 198,464 logic elements, 8,211,456 RAM bits (8 Mbits embedded memory), and 226 maximum user I/Os - all in a 484-ball FBGA package on a 1.2 V low-power process. The C7 suffix denotes the commercial 0C to +85C temperature range and the C7 speed grade. Source: Intel Cyclone III Device Handbook.

What is the best Xilinx equivalent for EP3CLS200F484C7?

The Xilinx cross-brand equivalent for the EP3CLS200F484C7 in a comparable logic capacity is the Spartan-6 XC6SLX150 or Spartan-7 XC7S200 family, but these are not pin-compatible drop-in replacements (different BGA footprint and different I/O bank voltages). Designers migrating from Cyclone III LS to Spartan must perform a full PCB redesign - there is no F484-footprint drop-in alternative from Xilinx.

엔지니어링 참조 데이터: EP3CLS200F484C7 — 비교, 설계 지침 및 규정 준수 정보.

선택 가이드

Choose the EP3CLS200F484C7 when you need maximum logic density (198,464 LEs) in the Cyclone III LS family, particularly for industrial motor control, factory automation gateways, or ASIC prototyping where the LS sub-family's low-power 1.2 V core is critical. For cost-down designs that fit within 150,848 LEs, choose the EP3CLS150F484C7 (same F484 footprint, drop-in compatible, smaller silicon). For industrial temperature range (-40C to +100C), choose the EP3CLS200F484I7 or EP3CLS200F484I7N. For tighter DSP timing margins, choose the C8 speed grade (EP3CLS200F484C8N). All five parts share the same F484 484-ball FBGA footprint, enabling PCB layout reuse across the family. Migrate to Cyclone IV E (e.g., EP4CE200F484) only when a full design recompile in Quartus Prime is acceptable.

대체품과의 비교

파라미터	이 제품	EP3CLS200F484C7N	EP3CLS200F484C8N	EP3CLS200F484I7	EP3CLS200F484I7N	EP3CLS150F484C7	EP3CLS150F484C7N
Package	484-FBGA (F484), 23 x 23 mm, 1.0 mm pitch	484-FBGA (F484) - same	484-FBGA (F484) - same	484-FBGA (F484) - same	484-FBGA (F484) - same	484-FBGA (F484) - same	484-FBGA (F484) - same
Brand	Intel	Intel	Intel	Intel	Intel	Intel	Intel
Logic Elements (LE)	198,464	198,464	198,464	198,464	198,464	150,848 (-24%)	150,848 (-24%)
Speed Grade	C7	C7	C8 (faster)	I7 (industrial)	I7 (industrial)	C7	C7
Temperature Grade	Commercial (0C to +85C)	Commercial (0C to +85C)	Commercial (0C to +85C)	Industrial (-40C to +100C)	Industrial (-40C to +100C)	Commercial (0C to +85C)	Commercial (0C to +85C)
Embedded Memory (RAM bits)	8,211,456	8,211,456	8,211,456	8,211,456	8,211,456	6,127,104	6,127,104
DSP (18x18) Blocks	396	396	396	396	396	320	320
PLLs	4	4	4	4	4	4	4
Core Voltage (VCCINT)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V

주요 차별점

Highest-density Cyclone III LS silicon in the F484 footprint (vs EP3CLS150F484C7)
Low-power Cyclone III LS sub-family positioning (vs EP3C120F484C7 (standard Cyclone III))
Mature ecosystem with extensive reference designs (vs Newer Intel Cyclone IV / V families)

설계 노트

Estimated: at 100% toggle rate on all 198K LEs and full DSP utilization, the EP3CLS200F484C7 dissipates approximately 3-5 W dynamic plus static. Designers should provide at least 4 bulk capacitors (10 uF to 100 uF) and 20+ ceramic 0.1 uF / 1 nF decoupling capacitors across VCCINT, VCCIO and VCCPD rails, placed as close as possible to the BGA balls. Follow Intel's PDN (power distribution network) guidance in the Cyclone III handbook to minimize SSN and maintain signal integrity.

The F484 484-ball FBGA uses a 1.0 mm ball pitch on a 23 x 23 mm body - escape routing requires at least 4 PCB layers with microvias (HDI stack-up recommended). Place the BGA on the top side with all decoupling on the opposite side or in inner layers to minimize via stubs. Use a continuous ground plane under the device and stitch the perimeter with GND vias to suppress EMI. Maintain symmetry of the power and ground planes to reduce ground bounce.

Do not assume C7 and C8 speed grades are interchangeable - the C8 grade passes tighter timing at the cost of higher power. Industrial (I7) and commercial (C7) variants differ in temperature screening; substituting an I7 part on a commercial-only PCB is acceptable, but substituting C7 for I7 violates the temperature spec. Verify the configuration mode (JTAG / Passive Serial / Active Serial) matches the on-board configuration memory before generating the bitstream.

Estimated: at 4 W total power dissipation and a typical 484-FBGA theta-JA of approximately 18 C/W (still air, JEDEC test conditions), the junction temperature rises roughly 72C above ambient. For commercial 0C-85C operation, ambient must remain below approximately 13C unless airflow is provided. In sealed enclosures, derate the design to 70% utilization or apply forced-air cooling to keep Tj below 85C.

규정 준수 정보

RoHS

Compliant

REACH

Compliant

AEC-Q100

Not Applicable

무연

Yes

무할로겐

Unknown

분쟁 광물

Compliant

RoHS compliant per Intel product page. Not AEC-Q100 qualified (industrial temperature grade I7 is available but not automotive-qualified). Lead-free per Intel product family policy. Cross-brand equivalents (e.g., Xilinx Spartan-6 LX150) do not share the F484 footprint and require PCB redesign.

데이터 검증일: 2026-09-09 — XAIPART 부품 엔지니어링 팀이 검증하고 관리한 데이터

출처: Distributor, Distributor, Octopart, Distributor, Manufacturer Datasheet, Distributor