HI5767/6CB - 10-Bit 60MSPS ADC, CMOS, SOIC-28 | Renesas
부품 번호: HI5767/6CB ✗ 단종| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $12.5 | $12.50 |
| 10 | $11.25 | $112.50 |
| 100 | $9.85 | $985.00 |
| 500 | $8.5 | $4,250.00 |
| 1,000 | $7.2 | $7,200.00 |
HI5767/6CB 개요
An ADC (analog-to-digital converter) is a mixed-signal integrated circuit that converts continuous analog input signals into discrete digital output codes for downstream processing. Within the broader semiconductor taxonomy, ADCs sit inside data converters, which fall under the mixed-signal IC family and ultimately under the integrated circuit (IC) hierarchy. Pipelined ADCs such as the HI5767/6CB segment the conversion into cascaded low-resolution stages, achieving a balance between speed, resolution, and power that earlier flash or successive-approximation architectures could not match.
Key features of the HI5767/6CB include a maximum sampling rate of 60 MSPS, an integral non-linearity (INL) typical figure within the 10-bit class, differential or single-ended analog inputs, and CMOS-compatible digital outputs. The wide input bandwidth supports IF undersampling for communications systems, while a low-power CMOS implementation keeps thermal dissipation in check even at the top sampling speed. An internal reference reduces external component count, simplifying board layout.
The pipelined architecture of the HI5767/6CB employs multi-stage switched-capacitor design with dedicated sample-and-hold and quantization stages; this architecture gives high throughput with controlled latency and supports continuous sampling at full clock rate. The CMOS process grants low dynamic power consumption relative to bipolar alternatives, an important consideration for dense multi-channel designs.
Typical applications for the HI5767/6CB include digital video broadcast equipment, intermediate-frequency (IF) signal processing in communications receivers, medical imaging front-ends, and general-purpose data-acquisition systems. The part is also frequently deployed in industrial imaging, where 10-bit resolution and 60 MSPS throughput are sufficient for cost-sensitive designs.
When designing with the HI5767/6CB, ensure the analog input network is bandwidth-limited to half the sampling rate (Nyquist) to avoid aliasing, and provide a clean low-jitter clock to the CLK pin to preserve aperture timing accuracy. Decoupling the supplies locally with 100 nF and 10 uF capacitors close to the AVDD and DVDD pins is recommended.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes drawn from the manufacturer datasheet, providing engineering context not available on the bare component listing.
드롭인 대체품: HI5767/6CB — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: HI5767/6CB (동일 폼 팩터 및 풋프린트) — 차이점: Architecture, Input Type, Number of Channels, Package, Sampling Rate.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
HI5767/6CBZ
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
HI5767/4CBZ-T
✅ 드롭인✓ 재고 있음
$8.25 / 개
데이터시트 보기 →HI5767/4CB-T
✅ 드롭인✓ 재고 있음
$4.95 / 개
데이터시트 보기 →HI5766KCAZ
✅ 드롭인✓ 재고 있음
$5.6 / 개
데이터시트 보기 →HI5767/6CB 최대 정격 & 전기적 특성
| 분해능 | 10 bits |
| Sampling Rate (max) | 60 MSPS |
| Sampling Rate (selections) | 20 / 40 / 60 MSPS |
| Architecture | Pipelined CMOS |
| Number of Channels | 1 input, 1 converter |
| Internal Voltage Reference | Yes (integrated) |
| Input Type | Single-ended |
| Package Type | SOIC-28 (300 mil) |
| 실장 유형 | Surface Mount |
HI5767/6CB 핀 구성
| 핀 1 | AVSS — Analog ground |
| 핀 2 | AVDD — Analog supply |
| 핀 3 | AIN — Analog input (single-ended) |
| 핀 4 | VREF — Internal reference bypass/decoupling |
| 핀 5 | REFIN — Reference input / VREF control |
| 핀 6 | GNDR — Reference ground |
| 핀 7 | NC — Not connected (per datasheet) |
| 핀 8 | DRVDD — Digital output driver supply |
| 핀 9 | DRGND — Digital output driver ground |
| 핀 10 | DVSS — Digital ground |
| 핀 11 | DVDD — Digital core supply |
| 핀 12 | CLK — Conversion clock input |
| 핀 13 | NC — Not connected (per datasheet) |
| 핀 14 | PD — Power-down control (active high) |
| 핀 15 | D9 — Data output bit 9 (MSB) |
| 핀 16 | D8 — Data output bit 8 |
| 핀 17 | D7 — Data output bit 7 |
| 핀 18 | D6 — Data output bit 6 |
| 핀 19 | D5 — Data output bit 5 |
| 핀 20 | D4 — Data output bit 4 |
| 핀 21 | D3 — Data output bit 3 |
| 핀 22 | D2 — Data output bit 2 |
| 핀 23 | D1 — Data output bit 1 |
| 핀 24 | D0 — Data output bit 0 (LSB) |
| 핀 25 | OTR — Out-of-range indicator |
| 핀 26 | DFS — Data format select |
| 핀 27 | AVSS — Analog ground (second) |
| 핀 28 | AVDD — Analog supply (second) |
일반적인 애플리케이션
HI5767/6CB 적합 용도: 7 애플리케이션s: Digital Video Broadcast Encoders, IF Signal Digitization in Communications Receivers, Medical Ultrasound Front-End, Industrial Imaging and Machine Vision, General-Purpose Data Acquisition Systems, Set-Top Box and Consumer Video Digitizing, Low-Cost Portable Test & Measurement.
Digital Video Broadcast Encoders
The HI5767/6CB's 10-bit resolution and 60 MSPS sampling rate suit the composite/S-video digitizer stage of SD/HD video encoders, where analog baseband bandwidth (typically up to 5 MHz for SD video) fits well within the 30 MHz Nyquist of 60 MSPS. Internal voltage reference minimizes temperature drift across long encoder channels. Power dissipation at 60 MSPS is moderate for a CMOS ADC, enabling the dense multi-channel layouts found in broadcast equipment racks.
추천
IF Signal Digitization in Communications Receivers
In digital receivers, the HI5767/6CB performs IF undersampling of intermediate-frequency signals (such as 21.4 MHz or 44 MHz IF stages in cellular base-station designs), allowing direct conversion to digital with relaxed analog filtering. The wide analog input bandwidth of pipelined CMOS ADCs supports this undersampling mode, and the 60 MSPS rate captures the IF while leaving guard bands. Driving the AIN pin with a passive anti-alias filter plus a broadband driver op amp is the typical reference design.
추천
Medical Ultrasound Front-End
Cost-sensitive medical ultrasound systems benefit from the HI5767/6CB's 10-bit/60 MSPS CMOS pipeline, digitizing each transducer channel's amplified echo at rates that meet B-mode imaging requirements. Multiple channels per board are feasible due to the moderate per-channel power and the SOIC-28 footprint. While higher-end systems use 12/14-bit ADCs (AD9225, AD9251), the HI5767/6CB remains a strong fit for portable and entry-level ultrasound designs.
추천
Industrial Imaging and Machine Vision
Multi-channel industrial camera front ends digitize analog CCD/CIS output signals through the HI5767/6CB. The 10-bit dynamic range captures typical machine-vision contrast profiles, and 60 MSPS supports VGA-resolution line-scan cameras running at moderate line rates. The wide input bandwidth accepts pre-amplified CCD signals up to ~25 MHz before aliasing, matching common 25 MSPS-per-channel architecture. Synchronizing across multiple HI5767/6CB ICs is straightforward using a shared low-jitter clock.
추천
General-Purpose Data Acquisition Systems
Data-acquisition PC plug-in cards and bench-top instruments digitize waveforms up to 30 MHz using the HI5767/6CB with 10-bit accuracy, trading resolution for high sampling rate. The integrated voltage reference reduces calibration overhead for general-purpose bench equipment. For users digitizing sonar, vibration, or transient signals, the HI5767/6CB provides good throughput at a competitive price point versus TI ADS8401/ADS8370 12/16-bit alternatives.
추천
Set-Top Box and Consumer Video Digitizing
Set-top boxes and consumer DVRs perform composite-video and component-video digitizing in the analog AV input stages using the HI5767/6CB at 60 MSPS. The pipelined architecture provides the low-latency conversion needed for live-preview pipelines, and the SOIC-28 package suits consumer thermal envelopes. The internal voltage reference simplifies the BOM and reduces cost, which matters in price-driven consumer electronics.
추천
Low-Cost Portable Test & Measurement
Portable digital oscilloscope front-ends and bench-top digitizers use the HI5767/6CB as a sub-range digitizer for 30 MHz-class scopes and waveform recorders. Its 60 MSPS sampling delivers useful single-shot capture for general bench use, with the pipelined architecture giving continuous waveform recording capability. The CMOS process keeps battery-powered designs within thermal and power budgets. Compact SOIC-28 packaging supports dense multi-channel frontend boards used in handheld instruments.
추천
추천 제품 요약
엔지니어링 참조 데이터: HI5767/6CB — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | HI5767/6CBZ | HI5767/4CBZ-T | HI5767/4CB-T | HI5766KCAZ |
|---|---|---|---|---|---|
| Brand | Renesas Electronics (formerly Intersil) | Renesas Electronics | Renesas Electronics | Renesas Electronics | Renesas Electronics |
| Package | SOIC-28 (300 mil) | SOIC-28 - same | SOIC-28 - same | SOIC-28 - same | SOIC-28 - same |
| Resolution | 10 bits | 10 bits | 10 bits | 10 bits | 10 bits |
| Sampling Rate (max) | 60 MSPS | 60 MSPS | 40 MSPS | 40 MSPS | 60 MSPS |
| Architecture | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS | Pipelined CMOS |
| Internal Voltage Reference | Yes | Yes | Yes | Yes | Yes |
| Channels | 1 | 1 | 1 | 1 | 1 |
| Lifecycle Status | NRND | NRND | NRND | Obsolete (brokers) | Active (per Site MPN list) |
주요 차별점
- Highest single-channel throughput in Renesas HI5767 family (vs HI5767/4CBZ-T)
- Integrated voltage reference reduces external BOM (vs HI5766KCAZ)
- 60 MSPS throughput exceeds entry-level pipelined ADCs from competitors at similar price (vs ADC102S101 series (10-bit 1 MSPS SAR))
설계 노트
Place 100 nF X7R ceramic bypass capacitors as close as possible to each AVDD/DVDD/DRVDD pin pair of the HI5767/6CB, with a 10 uF bulk tantalum or ceramic capacitor at the analog supply rail. The internal voltage reference requires its own decoupling cap on the VREF pin to suppress kickback during sample-and-hold transitions. Keep analog and digital ground planes separate and join them at a single point under the SOIC-28 exposed pad area to avoid ground loops.
Drive the AIN pin with a broadband ADC driver op-amp (such as AD8055 or LMH6552) and a passive anti-alias filter (typically a 2nd-order RC or LC network). The HI5767/6CB's switched-capacitor input structure causes periodic kickback currents; placing a small resistor (typically 10-33 ohm) between the drive amplifier and the ADC input forms a controlled-impedance source for the internal sampling capacitor. Aperture jitter in the external clock directly degrades SNR at high input frequencies - keep clock jitter below 1 ps RMS for full-bandwidth operation.
Estimated: at 60 MSPS operation with 3.3 V AVDD/DVDD supplies the HI5767/6CB dissipates approximately 100-150 mW (datasheet figure [DATA_NEEDED]). The SOIC-28 package has theta_JA around 70-90 C/W, so worst-case junction temperature rises ~10 C above ambient at the dissipation level, well within the 125 C junction limit. Ensure at least 1 square inch of copper pour area on top-layer land for the analog supplies to provide a low-impedance thermal path.
Do not exceed the analog input range beyond AVDD+0.3 V or below AVSS-0.3 V - overdrive will permanently damage the ADC. The HI5767/6CB requires a clean low-jitter CMOS clock at the CLK pin; a poor clock source (such as a microcontroller's PWM output) causes severe performance degradation. The DRVDD supply must be present before the digital outputs leave high-impedance state; sequencing violations can latch up the output buffer.
규정 준수 정보
RoHS/REACH/lead-free data not present in the verified web search results and not declared on datasheet excerpts. The Z-suffix variant HI5767/6CBZ is widely described as lead-free in distributor listings, but for the requested part HI5767/6CB this information is not in the verified data. Treat all compliance fields as 'unknown' for HI5767/6CB until the manufacturer datasheet is consulted directly.
