STM32F103Z8T6 - 72MHz Cortex-M3 MCU 64KB LQFP-144 | STMicroelectronics
부품 번호: STM32F103Z8T6 ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $5.5 | $5.50 |
| 10 | $4.95 | $49.50 |
| 100 | $4.4 | $440.00 |
| 500 | $3.95 | $1,975.00 |
| 1,000 | $3.55 | $3,550.00 |
STM32F103Z8T6 개요
A microcontroller (MCU) is a single-chip computer combining a processor core, memory, and peripherals, sitting at the lowest level of the embedded-system hierarchy: MCU -> embedded processor -> system-on-chip. The STM32F1 family was one of the first mainstream ARM Cortex-M families and remains one of the most widely deployed MCU platforms in industrial, consumer, and communication equipment worldwide.
Key features of the STM32F103Z8T6 include the 72 MHz Cortex-M3 core with fast interrupt handling, 64 KB (64K x 8) Flash program memory with ECC-style write protection, 20 KB SRAM, two 12-bit 1 us ADCs, seven 16-bit timers including advanced motor-control PWM timers, and a rich I/O count enabled by the 144-pin package with up to 112 GPIOs. Per the ST STM32F103x8/B datasheet, the device operates from a 2.0 V to 3.6 V supply across -40C to +85C (temperature grade 6).
Technically, the medium-density STM32F103 uses an ARMv7-M architecture with a 3-stage pipeline and Harvard bus structure, plus an embedded Flash accelerator that keeps performance close to zero-wait-state execution at 72 MHz. DMA over the bus matrix offloads data movement for ADC, USART, SPI, and I2C, minimizing CPU overhead in real-time control loops.
Typical applications include industrial control and PLC I/O modules, motor control (BLDC/FOC via the advanced timers and dual ADC), communication and gateway boards using CAN and multiple UARTs, consumer appliances, and low-cost development platforms such as the well-known Blue Pill family (which uses the 48-pin sibling STM32F103C8T6).
When designing with this part, verify Flash wait-state settings at 72 MHz (2 wait states), respect the 3.6 V absolute maximum on VDD, and remember the famous revision-Y errata affecting some early USB implementations - consult errata sheet ES096 for details.
This page synthesizes distributor pricing context, verified drop-in alternatives (including GigaDevice GD32F103), and practical design notes not found in the manufacturer datasheet alone.
드롭인 대체품: STM32F103Z8T6 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: STM32F103Z8T6 (동일 폼 팩터 및 풋프린트) — 차이점: Communication Interfaces, Package, Timers, ADC Resolution, Operating Temperature.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
STM32F103ZBT6
✅ 드롭인 ⚠️ 사양 미검증📋 참조 대체품 (카탈로그에 없음)
STM32F103ZCT6
✅ 드롭인 ⚠️ 사양 미검증✓ 재고 있음
가격 문의
데이터시트 보기 →GD32F103Z8T6
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
APM32F103Z8T6
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CKS32F103Z8T6
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
CH32F103Z8T6
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
STM32F103Z8T6 최대 정격 & 전기적 특성
| Core | ARM Cortex-M3 32-bit |
| Core Frequency | 72 MHz |
| Flash Memory | 64 KB (64K x 8) |
| SRAM | 20 KB |
| 공급 전압 | 2.0 V to 3.6 V |
| ADC Resolution | 12-bit |
| ADC Channels | 2 x 12-bit ADC, up to 16 external channels |
| Timers | Seven 16-bit timers (incl. advanced PWM timers) |
| Communication Interfaces | USB 2.0 full-speed, CAN 2.0B, USART, SPI, I2C |
| 동작 온도 | -40C to +85C (grade 6) |
| 패키지 | LQFP-144 (T6) |
| 실장 유형 | Surface Mount |
| Architecture | ARMv7-M, 3-stage pipeline, Harvard bus |
| DMA | Yes, multi-channel DMA controller |
| Errata Reference | ES096 (STM32F103x8/B errata sheet) |
| RoHS 상태 | Compliant |
STM32F103Z8T6 lqfp-144 (t6) 핀 구성 가이드
STM32F103Z8T6(lqfp-144 (t6) 패키지)의 핀 구성입니다. 이 디지털 IC에는 GPIO, 통신 인터페이스(UART, SPI, I2C), 전원 핀이 포함되어 있습니다. 대체 핀 기능과 구성 옵션은 제조사 데이터시트를 참조하십시오. 임베디드 시스템 설계와 PCB 레이아웃에 필수적입니다.
다음에 대한 상세 핀아웃 데이터 없음: STM32F103Z8T6.
다음을 참조하십시오: 데이터시트 전체 핀 구성은 다음을 참조하십시오.
일반적인 애플리케이션
STM32F103Z8T6 적합 용도: 6 애플리케이션s: Industrial Control and PLC I/O Modules, Motor Control (BLDC / FOC Drives), CAN / UART Communication Gateways, USB Instruments and Data Acquisition, Consumer Appliance Control Boards, Low-Cost Development Platforms (Blue Pill Ecosystem).
Industrial Control and PLC I/O Modules
The STM32F103Z8T6 fits industrial control cards because its 144-pin LQFP provides up to 112 GPIOs plus multiple USART, SPI, and I2C banks needed to interface relays, isolators, and fieldbus transceivers. The 72 MHz Cortex-M3 with DMA offloads scan-cycle tasks, while the dual 12-bit ADC reads analog sensor channels at 1 us conversions. Its 2.0-3.6 V operation and -40C to +85C grade-6 rating suit cabinet-mounted electronics. Placed as the main controller with optocoupler-isolated I/O, it delivers deterministic GPIO response and CAN connectivity; unlike smaller 48-pin F103 parts, the Z8 variant eliminates the need for external I/O expanders, reducing BOM count and latency.
추천
Motor Control (BLDC / FOC Drives)
The STM32F103Z8T6 is well matched to 3-phase motor drives: advanced timers TIM1/TIM8 generate complementary PWM with programmable dead-time, and the two 12-bit ADCs perform 1 us conversions for simultaneous phase-current sampling synchronized to PWM events. The 72 MHz core executes FOC or sensorless observers within the control loop budget, and the 144-pin package offers enough channels for multi-axis or servo topologies plus gate-driver interface pins. Configured with a 3-phase gate driver and shunt-based current sensing, the MCU closes current loops at 10-20 kHz; the trade-off versus Cortex-M4 parts is the absence of an FPU, so fixed-point FOC libraries such as ST's F103 motor-control firmware are recommended.
추천
CAN / UART Communication Gateways
Gateway and protocol-converter boards benefit from the STM32F103Z8T6's bxCAN 2.0B controller with 14 hardware filters, multiple USARTs, and USB 2.0 full-speed device - all operable concurrently. The 72 MHz core plus DMA handles line-rate UART bridging without CPU saturation, and the generous LQFP-144 I/O count supports dual redundant CAN channels, RS-485, and status indication on one chip. In a typical node, the MCU sits between a CAN transceiver and RS-485/USB PHY, translating frames at rates up to 1 Mbps CAN and 12 Mbps USB; hardware CAN filtering offloads arbitration and matching, keeping worst-case latency predictable in industrial networks.
추천
USB Instruments and Data Acquisition
For USB-connected data acquisition modules, the STM32F103Z8T6 pairs its USB 2.0 full-speed device controller (12 Mbps) with dual 12-bit ADCs, enabling streaming of sampled sensor data to a host PC over USB CDC or custom HID classes. The 20 KB SRAM buffers bulk transfers while DMA moves ADC results without CPU intervention, and the 144-pin variant exposes more analog channels than the 48-pin C8 sibling - up to 16 external ADC inputs. Powered from the USB 5 V rail via a 3.3 V LDO, a single-chip DAQ can sample multiple channels in the several-hundred-ksps range; for faster throughput, an external ADC over SPI is the standard extension path.
추천
Consumer Appliance Control Boards
Appliance mainboards (air conditioners, rice cookers, washing machines) use the STM32F103Z8T6 for its balance of cost, peripheral richness, and mature library ecosystem. Seven 16-bit timers drive displays, buzzer tones, and inverter-compressor PWM, while the 12-bit ADCs read NTC temperature sensors and user-interface keys. The -40C to +85C operating range covers harsh kitchen and outdoor-unit environments, and 5 V-tolerant I/Os simplify interfacing with legacy 5 V logic. Running a superloop or light RTOS, the 72 MHz core handles display refresh and control concurrently; designers should add EMI filtering on motor-PWM I/O and follow ST's layout guidance for Flash integrity in noisy environments.
추천
Low-Cost Development Platforms (Blue Pill Ecosystem)
The STM32F103 family anchors the world's most popular low-cost ARM ecosystem - the Blue Pill board (built on the 48-pin STM32F103C8T6) - and the Z8T6 serves the 144-pin variant of the same ecosystem for projects needing more I/O, such as retro-computing expansion boards, FPGA companion controllers, and robotics mainboards. Identical core and toolchain (Keil, STM32CubeIDE, PlatformIO, GCC) mean code developed for C8 boards runs unchanged on the Z8 with added peripherals. Developers benefit from ST-Link/SWD debugging and vast community libraries; the key consideration is that the Z8's extra I/O banks require configuring additional AFIO remap registers not exercised on 48-pin targets.
추천
추천 제품 요약
엔지니어링 참조 데이터: STM32F103Z8T6 — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | STM32F103ZBT6 | STM32F103ZCT6 | GD32F103Z8T6 | APM32F103Z8T6 | CH32F103Z8T6 |
|---|---|---|---|---|---|---|
| Package | LQFP-144 | LQFP-144 - same | LQFP-144 - same | LQFP-144 - same | LQFP-144 - same | LQFP-144 - same |
| Brand | STMicroelectronics | STMicroelectronics | STMicroelectronics | GigaDevice | Geehy Semiconductor | WCH (Nanjing Qinheng) |
| Core / Frequency | Cortex-M3, 72 MHz | Cortex-M3, 72 MHz | Cortex-M3, 72 MHz | Cortex-M3, up to 108 MHz | Cortex-M3, 72 MHz | Cortex-M3, 72 MHz |
| Flash | 64 KB | 128 KB | 256 KB | 64 KB | 64 KB | 64 KB |
| SRAM | 20 KB | 20 KB | 48 KB | 20 KB | 20 KB | 20 KB |
| USB | USB 2.0 full-speed device | USB 2.0 FS device | USB 2.0 FS device | USB 2.0 FS device | USB 2.0 FS device | USB 2.0 FS device (WCH implementation) |
| ADC | 2 x 12-bit | 2 x 12-bit | 2 x 12-bit | 2 x 12-bit | 2 x 12-bit | 2 x 12-bit |
| Register Compatibility / Migration Risk | Reference (native STM32 HAL/StdPeriph) | 100% - same family | 100% - same family | Largely compatible - recheck wait-states/HAL | Largely compatible | Compatible with verified peripheral differences |
주요 차별점
- Highest I/O density in the STM32F103x8 tier (vs STM32F103C8T6)
- Native ST ecosystem and errata transparency (vs GD32F103Z8T6)
- Cost-efficient entry point in the 144-pin Z-series (vs STM32F103ZCT6)
설계 노트
Power the STM32F103Z8T6 from a clean 3.3 V rail within the 2.0-3.6 V datasheet range; absolute maximum VDD is 4.0 V and functional rating tops out at 3.6 V, so 5 V-tolerant I/O does NOT mean 5 V-tolerant supply. Decouple each VDD pin (multiple on a 144-pin LQFP) with 100 nF ceramics placed within 2-3 mm of the pin, plus 4.7-10 uF bulk per power domain. Use separate VDDA filtering (ferrite + 1 uF + 10 nF) for the analog domain to preserve 12-bit ADC accuracy.
Configure Flash latency to 2 wait states when running at 72 MHz (48-72 MHz range per the STM32F103x8/B datasheet); forgetting this after changing HCLK from the 8 MHz default is the most common bring-up failure. Also consult errata sheet ES096 before using USB - certain early revision-Y devices have documented USB issues. When substituting GD32F103 or other cross-brand drop-ins, recheck clock tree, Flash wait-states, and HAL delay assumptions since Flash accelerator behavior differs.
For the 144-pin LQFP (0.5 mm pitch), fan out with 4-6 mil traces and use periphery dog-bone vias or via-in-pad if impedance allows. Reserve the bottom layer as a ground pour and place the NRST pin's 100 nF capacitor close to the pin; keep the SWD header (SWDIO/SWCLK) accessible on a 4-pin connector for production programming. If using USB, route D+/D- as a 90-ohm differential pair and add the mandated 1.5 k pull-up configuration on D+ (embedded in the F103 device, ensure external circuitry does not conflict).
규정 준수 정보
RoHS compliance per ST product family policy for current STM32 production. REACH/halogen-free declarations not present in provided data.
