UJA1169ATK/F/3 - Mini HS-CAN SBC, 3.3V LDO, 20-HVSON | NXP
부품 번호: UJA1169ATK/F/3 ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $5.64 | $5.64 |
| 10 | $5.21 | $52.10 |
| 100 | $4.62 | $462.00 |
| 500 | $3.95 | $1,975.00 |
| 1,000 | $3.48 | $3,480.00 |
UJA1169ATK/F/3 개요
A System Basis Chip (SBC) is an automotive-grade mixed-signal IC that consolidates a CAN/CAN FD transceiver with one or more voltage regulators, system protection, and optional wake-up logic into a single package. SBCs sit between the vehicle battery and the microcontroller, replacing several discrete components (transceiver, LDO, watchdog, reset generator) and reducing PCB area, BOM cost, and quiescent current in always-on networks. The UJA1169ATK family targets body-control modules, gateway ECUs, and zonal architectures in modern vehicles.
Key features include a 3.3 V / 250 mA V1 regulator for the host MCU, a 5 V internal V2 regulator for the CAN transceiver, low quiescent current in standby and sleep modes with selective wake-up, an SPI interface for configuration and diagnosis, and integrated bus-failure management. The selective wake-up function allows ECUs to ignore CAN traffic not addressed to them, dramatically reducing network-wide quiescent current in CAN partial-networking architectures. The HVSON-20 package with exposed pad provides low thermal resistance for reliable operation in under-hood environments.
The UJA1169ATK/F/3 is typically used in body and comfort ECUs, gateway modules, and any node that must wake selectively from CAN partial-networking traffic. It is particularly suited to OEM platforms targeting ISO 11898-2:2016 compliance with CAN FD-passive wake-up, where legacy nodes and FD-capable nodes coexist on the same bus.
When designing with this SBC, ensure the HVSON exposed pad is soldered to a sufficient copper area for thermal dissipation, follow NXP's reference layout for the bus split termination, and configure the partial-networking filter mask in software to match the OEM-defined wake-up frame. All configuration is via SPI from the host MCU; no external programming is required.
This page synthesizes distributor pricing, drop-in same-family variants, and practical design notes for the UJA1169ATK/F/3 that go beyond what the manufacturer datasheet alone provides.
드롭인 대체품: UJA1169ATK/F/3 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: UJA1169ATK/F/3 (동일 폼 팩터 및 풋프린트) — 차이점: Package, Watchdog, CAN FD Support, CAN Standard, Low-Power Modes.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
UJA1169ATK/F/3Z
✅ 드롭인✓ 재고 있음
$2.31 / 개
데이터시트 보기 →UJA1169ATK/3
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
UJA1169ATK/F
✅ 드롭인✓ 재고 있음
$3.12 / 개
데이터시트 보기 →UJA1169ATK
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
UJA1169ATK/X/F/3
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
UJA1169ATK/X/F
✅ 드롭인📋 참조 대체품 (카탈로그에 없음)
UJA1169ATK/F/3 사양
| 기능 | Mini High-Speed CAN System Basis Chip (SBC) |
| CAN Standard Compliance | ISO 11898-2:2016, SAE J2284-1 to SAE J2284-5 |
| CAN FD Support | Up to 5 Mbit/s |
| V1 Regulator Output (MCU supply) | 3.3 V, 250 mA |
| V2 Regulator Output (CAN transceiver) | 5 V internal |
| Partial Networking / Selective Wake-up | Yes (CAN FD-passive, /F suffix) |
| VEXT Supply for Off-board Loads | No (not on /X variants only) |
| Control Interface | SPI |
| Bus Failure Protection | Integrated (dominant and recessive timeout) |
| Watchdog | Yes (window/timeout configurable via SPI) |
| 패키지 | 20-pin HVSON (3.5 x 5.5 mm) |
| 실장 유형 | Surface Mount |
| 동작 온도 | -40C to +125C (automotive grade 1) |
| RoHS 상태 | Compliant |
| AEC-Q100 Qualification | Qualified (automotive) |
UJA1169ATK/F/3 핀 구성
| 핀 1 | SCLK — SPI clock input from host MCU |
| 핀 2 | SDI — SPI data input (MOSI) |
| 핀 3 | SDO — SPI data output (MISO) |
| 핀 4 | SCSN — SPI chip select, active low |
| 핀 5 | INTN — Interrupt output, active low |
| 핀 6 | WAKE — Local wake-up input |
| 핀 7 | V1 — 3.3 V / 250 mA microcontroller supply output |
| 핀 8 | V2 — 5 V internal CAN transceiver supply |
| 핀 9 | VBat — Battery supply input (12 V nominal) |
| 핀 10 | GND — Ground |
| 핀 11 | CANH — CAN high-side bus line |
| 핀 12 | CANL — CAN low-side bus line |
| 핀 13 | SPLIT — Bus split termination output |
| 핀 14 | RXD — CAN receive data to MCU |
| 핀 15 | TXD — CAN transmit data from MCU |
| 핀 16 | STBN — Standby control input, active low |
| 핀 17 | RSTN — Reset output to MCU, active low |
| 핀 18 | WKPN — Wake-up pattern indication, active low |
| 핀 19 | TH1 — Thermal sense / test pin (per datasheet) |
| 핀 20 | EP — Exposed pad - thermal and ground, must be soldered |
일반적인 애플리케이션
UJA1169ATK/F/3 적합 용도: 6 애플리케이션s: Automotive Body Control Module (BCM), CAN Gateway ECU, Electric Vehicle Battery Management Slave Node, Industrial CAN FD Sensor Hub, CAN FD Diagnostic Interface for ADAS Domain Controller, Tractor and Off-Highway CAN Node.
Automotive Body Control Module (BCM)
The UJA1169ATK/F/3 fits body control modules where a single CAN FD node must integrate partial-networking selective wake-up to keep quiescent current below 100 uA in parked mode, plus a 3.3 V / 250 mA LDO that powers the host MCU directly without an external regulator. Placed between the vehicle 12 V battery and the BCM MCU, the SBC consolidates the HS-CAN transceiver, MCU supply, and SPI-controlled diagnostics into one 20-HVSON device. The CAN FD-passive wake-up receiver detects wake frames even when only legacy CAN traffic is present, a critical feature for OEM body networks migrating from CAN to CAN FD. Compared to a discrete transceiver + LDO design, the UJA1169ATK/F/3 reduces PCB area by roughly 50 percent and BOM count by 3-4 parts.
추천
CAN Gateway ECU
The UJA1169ATK/F/3 is well suited to central or zonal gateway ECUs that bridge CAN FD powertrain domains with classical CAN body domains. The selective wake-up function lets the gateway sleep while still monitoring CAN traffic for wake frames, then wake the rest of the network when an authenticated wake ID is received. The 3.3 V V1 LDO at 250 mA comfortably supplies an S32K3xx-class gateway MCU plus housekeeping logic. AEC-Q100 grade 1 qualification plus the 20-HVSON exposed pad make it thermally robust even at +125 C ambient under-hood. Engineers gain a single BOM line for the CAN interface, MCU supply, and partial-networking logic, simplifying PPAP documentation across OEM platforms.
추천
Electric Vehicle Battery Management Slave Node
In EV battery management systems, each cell-monitoring slave node typically connects to the vehicle CAN FD backbone and must consume minimal current when the pack is parked for weeks. The UJA1169ATK/F/3's selective wake-up with CAN FD-passive lets the slave ignore CAN FD traffic unless its unique wake ID is on the bus, holding quiescent current below the OEM target. The integrated 3.3 V / 250 mA V1 regulator powers a small cell-monitoring IC or analog front-end without a separate LDO. The 20-HVSON package handles the +85 C battery-pack environment with margin, and the SPI interface exposes battery diagnostics to the master BMS controller over the same CAN channel.
추천
Industrial CAN FD Sensor Hub
Beyond automotive, the UJA1169ATK/F/3 serves in industrial CAN FD sensor hubs that must comply with ISO 11898-2:2016 and survive harsh factory environments. The selective wake-up function lets battery-backed sensor nodes sleep until commanded by a master, extending service intervals in remote installations. The 3.3 V V1 LDO at 250 mA supplies a small industrial MCU plus sensor front-end; the AEC-Q100 grade 1 temperature range (-40 C to +125 C) exceeds typical industrial requirements and provides headroom for outdoor enclosures. The 20-HVSON footprint keeps PCB area minimal, allowing the SBC to fit alongside MEMS accelerometers and temperature sensors on a 25 x 25 mm module.
추천
CAN FD Diagnostic Interface for ADAS Domain Controller
The UJA1169ATK/F/3 can act as the secondary CAN FD interface on an ADAS domain controller, offloading the diagnostic channel from the main transceiver. ADAS platforms often need a dedicated CAN FD link to chassis ECUs for sensor-fusion diagnostics, and the UJA1169ATK/F/3's selective wake-up lets the diagnostic channel sleep when the vehicle is parked without affecting the primary ADAS CAN. The 3.3 V V1 regulator can power a small companion MCU that logs diagnostic frames locally. The 20-HVSON 3.5 x 5.5 mm package fits on a daughter-card next to the main SoC, and SPI allows runtime configuration of wake frames and bus-fault behavior.
추천
Tractor and Off-Highway CAN Node
Agricultural and construction machinery increasingly use CAN FD backbones for ISO 11783 (ISOBUS) implement communication, and the UJA1169ATK/F/3 is well matched to implement nodes that must run directly from a 12 V or 24 V battery with strict quiescent-current budgets during storage. The selective wake-up feature wakes the implement only when the tractor commands it, preserving battery life over a winter storage season. The 3.3 V V1 LDO at 250 mA supports a small ISOBUS microcontroller plus a CAN-based joystick interface. AEC-Q100 grade 1 qualification covers the wide -40 C to +125 C range demanded by off-highway OEMs.
추천
추천 제품 요약
엔지니어링 참조 데이터: UJA1169ATK/F/3 — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | UJA1169ATK/F/3Z | UJA1169ATK/3 | UJA1169ATK/F | UJA1169ATK/X/F/3 |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 20-HVSON (3.5x5.5) | 20-HVSON (3.5x5.5) - same | 20-HVSON (3.5x5.5) - same | 20-HVSON (3.5x5.5) - same | 20-HVSON (3.5x5.5) - same |
| V1 Regulator Output | 3.3 V / 250 mA | 3.3 V / 250 mA | 3.3 V / 250 mA | 5 V / 250 mA | 3.3 V / 250 mA |
| Selective Wake-up (/F) | Yes (CAN FD-passive) | Yes (CAN FD-passive) | No | Yes (CAN FD-passive) | Yes (CAN FD-passive) |
| VEXT Off-board Supply (/X) | No | No | No | No | Yes (5 V) |
| V2 Internal CAN Supply | 5 V | 5 V | 5 V | 5 V | 5 V |
| CAN FD Support | Up to 5 Mbit/s | Up to 5 Mbit/s | Up to 5 Mbit/s | Up to 5 Mbit/s | Up to 5 Mbit/s |
| Automotive Grade (AEC-Q100) | Grade 1 | Grade 1 | Grade 1 | Grade 1 | Grade 1 |
| Pin-to-pin Compatible with UJA1169ATK/F/3 | Yes (reference) | Yes | Yes | Yes | Yes |
주요 차별점
- V1 = 3.3 V (matches modern automotive MCUs) without external LDO (vs UJA1169ATK/F)
- Includes selective wake-up (CAN FD-passive) for partial networking (vs UJA1169ATK/3)
- No VEXT regulator - simpler BOM for nodes without off-board loads (vs UJA1169ATK/X/F/3)
설계 노트
Solder the 20-HVSON exposed pad (pin 20 / EP) to a continuous ground copper plane with at least 25 thermal vias to the inner ground layer to meet the datasheet thermal resistance and handle +125 C ambient. Place 100 nF X7R decoupling capacitors on VBat and V1 within 2 mm of the pins. Keep the CANH/CANL traces as a matched differential pair with 120 ohm characteristic impedance and 100 ohm split-termination (two 60 ohm resistors with a 4.7 nF capacitor to ground at the SPLIT pin) per NXP's reference layout.
Estimated: at VBat=12 V, V1=3.3 V at 250 mA, the SBC dissipates roughly (12-3.3)*0.250 = 2.18 W in the V1 LDO. With a typical theta_JA of ~35 C/W on a 4-layer JEDEC EIA/JESD51 1sq inch pad, junction temperature rise is ~76 C above ambient; at 85 C ambient the junction reaches ~161 C - above the +150 C thermal shutdown limit. Reduce VBat input (e.g., pre-regulate to 8 V) or attach an external heatsink copper pour of 2-3 sq inches for margin. This is an estimate from first principles; refer to the NXP UJA1169 datasheet thermal curves for verified theta_JA.
Do not leave the WAKE pin floating - tie it to GND or V1 through a 10 kohm resistor if unused, otherwise spurious wake events may occur. Configure the partial-networking wake ID and mask via SPI before entering Sleep mode; the SBC will not detect wake frames until the filter is set. Verify the SPLIT pin capacitor (typically 4.7 nF to 100 nF) is rated for the bus DC voltage, and ensure the RSTN open-drain output is pulled up to V1 with at least 10 kohm. Failure to observe the SPI clock max frequency (5 MHz) can corrupt register writes during partial-networking configuration.
규정 준수 정보
AEC-Q100 grade 1 qualified per NXP UJA1169 family datasheet. RoHS and REACH compliant per NXP product page. Halogen-free and lead-free per automotive OEM requirements.
