CDK1308AILP40 vs CDK1307DILP40 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci CDK1308AILP40 disebabkan oleh MaxLinear dan CDK1307DILP40 disebabkan oleh MaxLinear. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr CDK1308AILP40 CDK1307DILP40
Merek MaxLinear MaxLinear
Kategori ADC/DAC ADC/DAC
Status Lingkungan Hidup Aktif Aktif
Pemecahkatan 10 bit 13 bit
Maximum Sample Rate 20 MSPS —
Family Sample Rate Options 20 / 40 / 65 / 80 MSPS —
Architecture Proprietary, digital error correction —
Reference Internal (no external reference required) Internal reference circuitry
Digital Interface CMOS, parallel —
Control Interface CMOS —
Power-Down Pin (PD_N) Yes (active low) —
Sleep Pin (SLP_N) Yes (active low) —
Kemasan 40-pin QFN 40-pin QFN
Jenis Pemasangan Surface Mount —
Power Consumption Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) —
Gambaran Suhu Operasi [DATA_NEEDED: operating temperature range] —
Tegangan Pemberi Arus [DATA_NEEDED: AVDD / DRVDD values] —
Status RoHS Compliant (per distributor listings) —
Manufacturer MaxLinear (formerly Exar Corporation) —
Sampling Rate (max) — 80 MSPS
Power Dissipation (typ) — 60 mW at 80 MSPS
Family Power Grades — 17 / 19 / 33 / 50 / 60 / 75 mW across speed grades
SNR — 72.4 dB at Fin = 8 MHz
Analog Supply Voltage — 1.8 V (core)
I/O Supply Voltage — 1.7 V to 3.6 V
Output Interface — Parallel CMOS
Clock Input — Differential, low-jitter
Track-and-Hold — Highly linear, optimized to Nyquist
Idle Modes — Standby and Power Down
Pin Compatibility — Pin-compatible with CDK1308
Pin Compatibility (family) — Same 40-pin QFN for A/B/C/D speed grades

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