EP1810JC-35 vs EP1810GC-35 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1810JC-35 disebabkan oleh Intel dan EP1810GC-35 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester
EP1810GC-35 ⚠ Bahagian terakhir untuk beliPengandingan Spesifikasi
| Parametr | EP1810JC-35 | EP1810GC-35 |
|---|---|---|
| Merek | Intel | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Masa Terakhir Dibeli |
| Device Family | Classic EPLD (EP1810) | — |
| Device Type | UV-Erasable Complex PLD (UV PLD / CPLD) | EPLD (Erasable Programmable Logic Device) |
| Number of Macrocells | 48 | — |
| Propagation Delay (tpd) | 35 ns (max) | — |
| Frekuensi Klock Maksimum | [DATA_NEEDED: fmax for this speed grade] | — |
| Process Technology | CMOS | — |
| Supply Voltage (Vcc) | 5 V (nominal) | — |
| Maximum Supply Voltage | 5.25 V (per distributor listing) | — |
| Package Type | CQCC-68 (Ceramic J-Lead Chip Carrier, QCCJ) | — |
| Number of Terminals | 68 | — |
| Terminal Form | J-Bend | — |
| Gambaran Suhu Operasi | 0°C to 70°C (Commercial) | — |
| Temperature Grade | Commercial | — |
| Erasure Method | UV (quartz-windowed ceramic package) | — |
| Status RoHS | Compliant (per Altera listing) | Not applicable (legacy ceramic package) |
| Lead-Free Status | Lead-free (per distributor listing) | Not applicable |
| Jenis Pemasangan | Surface Mount (J-Lead) | Through Hole |
| Logic Architecture | Programmable AND/OR array with macrocell outputs | — |
| Logic Family | — | Altera Classic EPLD |
| Technology | — | CMOS, UV-erasable EPROM cells |
| Kemasan | — | CPGA-68 (Ceramic Pin Grid Array, 68-pin) |
| Bilangan Pin | — | 68 |
| Propagation Delay (tpd max) | — | 40 ns |
| Maximum Inputs | — | 64 |
| Maximum Outputs | — | 48 |
| Macrocells | — | 16 |
| I/O Standard | — | TTL-compatible |
| Programming Method | — | UV erasure + EPROM programming |
| Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: VCC range] |
| Manufacturer (current source) | — | Rochester Electronics (authorized Altera EPLD partner) |
| Original Manufacturer | — | Altera Corporation (now Intel FPGA) |