EP1810LI-35 vs EP1810LC-45 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1810LI-35 disebabkan oleh Altera dan EP1810LC-45 disebabkan oleh Rochester Electronics. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1810LI-35 EP1810LC-45
Merek Altera Rochester Electronics
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Manufacturer Rochester Electronics, LLC (original Altera design) —
Part Family Altera Classic EPLD —
Device Type Erasable Programmable Logic Device (EPLD) EPLD (Erasable Programmable Logic Device)
Macrocells 48 —
Propagation Delay (tPD) 35 ns —
Speed Grade 35 (slowest in EP1810L family) —
Kemasan 68-pin PLCC (J-Lead, plastic) 68-pin PLCC (J-lead)
Pin/Package Code PLCC-68 / PQCC68 —
Technology CMOS, UV-erasable EPROM configuration cell —
Tegangan Pemberi Arus 5 V (TTL-compatible I/O) —
Suhu Operasi -40 C to +85 C (industrial, 'I' suffix) 0 °C to +70 °C (commercial)
Jenis Pemasangan Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket compatible)
JTAG Boundary Scan IEEE 1149.1 compliant —
Logic Elements Logic Array Blocks (LABs) connected via Programmable Interconnect Array (PIA) —
Status RoHS [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status of Rochester-sourced part]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free finish]
Aras MSL [DATA_NEEDED: MSL rating] —
Family — Altera Classic EPLD
Usable Gates — 900
Macro Cells — 48
Maximum Inputs — 64
Maximum Outputs — 48
Logic Array Blocks — 4
Propagation Delay (tpd) — 45 ns
Maximum Operating Frequency — 22.2 MHz
Supply Voltage (Vcc) — 5 V (±5%)
Process Technology — 5 V CMOS EPROM

Laporan Datasheet & Sumber

Lihat Semua Produk Buat BOQ Minta Bao Harga