EP1810LI-45 vs EP1810JI-45 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1810LI-45 disebabkan oleh Rochester Electronics dan EP1810JI-45 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1810LI-45 EP1810JI-45
Merek Rochester Electronics Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Obsolete
Product Type EPLD (Erasable Programmable Logic Device) —
Family Altera Classic —
Usable Gates 900 —
Macrocells 48 —
Maximum User I/O 64 inputs / 48 outputs —
Pin-to-Pin Logic Delay (tPD) 45 ns —
Counter Frequency (fCNT) up to 100 MHz —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Technology CMOS, UV-erasable EPROM configuration CMOS EPROM
Tegangan Pemberi Arus 5 V 5 V (TTL compatible)
Gambaran Suhu Operasi -40 C to +85 C (Industrial, 'I' suffix) —
Kemasan 68-pin PLCC / PQCC68 (J-Lead) —
Logic Blocks 12 LABs of 4 macrocells each —
Configuration Memory Non-volatile UV-erasable EPROM —
Programming Method Altera programming hardware with MAX+PLUS II / legacy tools UV-erase (windowed) / OTP via JEDEC
Status RoHS [DATA_NEEDED: RoHS status] —
Manufacturer Rochester Electronics (licensed continuation of Altera / Intel PSG Classic EPLD line) Altera (now Intel FPGA)
Series — Classic EPLD Family
Device Type — UV-Erasable / OTP Complex PLD
Macrocell Count — 48
Maximum Operating Frequency — 33.3 MHz
Propagation Delay (tPD) — 50 ns
Configurable I/O Lines — 48
Dedicated Inputs — 12
Package Code — QCCJ
Package Type — 68-pin JLCC (J-leaded ceramic chip carrier)
Terminal Form — J BEND
Package Shape — SQUARE
Number of Terminals — 68
Temperature Grade — INDUSTRIAL
Suhu Operasi — -40 °C to +85 °C

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