EP1S40F1020C5DM vs EP1S40F1020C5GA Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1S40F1020C5DM disebabkan oleh Intel dan EP1S40F1020C5GA disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP1S40F1020C5DM EP1S40F1020C5GA
Merek Intel Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Type FPGA - Field Programmable Gate Array —
Series Stratix Stratix
Logic Elements 41,250 —
Embedded Memory 3,423 Kbits TriMatrix —
User I/O Count 773 773
Number of LABs/CLBs 4125 —
DSP Blocks 12 (up to 28.8 GMACS at 200 MHz) Embedded multiplier blocks (count per Stratix datasheet family)
Number of PLLs 6 (8 outputs each) —
Number of Clock Networks 16 —
Kemasan 1020-ball FineLine BGA (33 mm x 33 mm, 1.0 mm pitch) 1020-BBGA (FineLine BGA)
Core Voltage VCCINT 1.5 V —
I/O Voltage VCCIO 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) —
Process Technology 0.13 µm CMOS —
Suhu Operasi 0C to +85C (commercial) 0C to +85C (Commercial)
Configuration Modes PS, PPS, PPA, JTAG —
Jenis Pemasangan Surface Mount (BGA) Surface Mount
Status RoHS [DATA_NEEDED: RoHS status] Unknown - non-GA suffix commercial part
Aras MSL [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
Logic Elements (LE) — 41,250
Total RAM Bits — 3,423,744
Speed Grade — C5
Process Node — 0.13 µm CMOS with 9-layer metal
Supply Voltage (Core) — [DATA_NEEDED: VCCINT value]
I/O Bank Count — [DATA_NEEDED: bank count]
PLL Count — Up to 12 enhanced PLLs (per Stratix family)
High-Speed Transceivers — Up to 12 channels (per Stratix family, variant dependent)
Configuration Method — JTAG, Passive Serial, Altera EPC device
Lead-Free — Yes (per Altera/Intel policy at release)

Laporan Datasheet & Sumber

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