EP1S40F1020C5DM vs EP1S40F1020C5GA Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP1S40F1020C5DM sa pamamagitan ng Intel at EP1S40F1020C5GA sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP1S40F1020C5DM | EP1S40F1020C5GA |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | FPGA - Field Programmable Gate Array | — |
| Series | Stratix | Stratix |
| Logic Elements | 41,250 | — |
| Embedded Memory | 3,423 Kbits TriMatrix | — |
| User I/O Count | 773 | 773 |
| Number of LABs/CLBs | 4125 | — |
| DSP Blocks | 12 (up to 28.8 GMACS at 200 MHz) | Embedded multiplier blocks (count per Stratix datasheet family) |
| Number of PLLs | 6 (8 outputs each) | — |
| Number of Clock Networks | 16 | — |
| Packhaging | 1020-ball FineLine BGA (33 mm x 33 mm, 1.0 mm pitch) | 1020-BBGA (FineLine BGA) |
| Core Voltage VCCINT | 1.5 V | — |
| I/O Voltage VCCIO | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Process Technology | 0.13 µm CMOS | — |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Configuration Modes | PS, PPS, PPA, JTAG | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Unknown - non-GA suffix commercial part |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL rating] |
| Logic Elements (LE) | — | 41,250 |
| Total RAM Bits | — | 3,423,744 |
| Speed Grade | — | C5 |
| Process Node | — | 0.13 µm CMOS with 9-layer metal |
| Supply Voltage (Core) | — | [DATA_NEEDED: VCCINT value] |
| I/O Bank Count | — | [DATA_NEEDED: bank count] |
| PLL Count | — | Up to 12 enhanced PLLs (per Stratix family) |
| High-Speed Transceivers | — | Up to 12 channels (per Stratix family, variant dependent) |
| Configuration Method | — | JTAG, Passive Serial, Altera EPC device |
| Lead-Free | — | Yes (per Altera/Intel policy at release) |