EP20K100CQ240C7 vs EP20K100CQ240C9 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K100CQ240C7 disebabkan oleh Altera dan EP20K100CQ240C9 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Intel
EP20K100CQ240C9 EP20K100CQ240C9 - APEX 20K FPGA 100K Gates 189 I/O QFP240 | Intel

EP20K100CQ240C9 - APEX 20K FPGA 100K Gates 189 I/O QFP240 | Intel

EP20K100CQ240C9 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EP20K100CQ240C7 EP20K100CQ240C9
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Family APEX-20K APEX 20K (SRAM-based FPGA)
Device Type FPGA (Field Programmable Gate Array) —
System Gates 100,000 —
Logic Elements 53,248 4,160
Embedded Memory Bits 4,160 —
Maximum User I/O Pins 189 —
Package Type 240-BFQFP 240-BQFP (QFP-240)
Speed Grade C7 C9 (-9 commercial)
Suhu Operasi 0C to +85C (commercial) 0°C to +85°C (commercial)
Supply Voltage - Core [DATA_NEEDED: core voltage] —
I/O Standards Supported LVTTL, LVCMOS, PCI, GTL (per family datasheet) LVTTL, LVCMOS, PCI, GTL
Number of PLLs 4 (per APEX-20K family datasheet) 4
Embedded System Blocks (ESBs) Yes (per APEX-20K family) —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS unknown [DATA_NEEDED: RoHS compliance status]
Lead-Free unknown —
Aras MSL [DATA_NEEDED: MSL rating] —
Programming Tool Altera Quartus / MAX+PLUS II (per family) —
Series — APEX 20K
Typical Gates — 100,000
Embedded Memory (RAM bits) — 53,248
User I/O Pins — 189
Process Technology — 0.22 µm CMOS SRAM
Programming Method — In-system SRAM (volatile)
Configuration Method — Serial/Passive Parallel/Byte-wide JTAG
Supply Voltage (VCCINT) — [DATA_NEEDED: VCCINT core voltage]
Supply Voltage (VCCIO) — [DATA_NEEDED: VCCIO I/O voltage]
JTAG (IEEE 1149.1) Support — Yes

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