EP20K100CQ240C7 vs EP20K100CQ240C9 比較
詳細並排比較 EP20K100CQ240C7 由 Altera 與 EP20K100CQ240C9 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K100CQ240C7 | EP20K100CQ240C9 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | APEX-20K | APEX 20K (SRAM-based FPGA) |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 100,000 | — |
| Logic Elements | 53,248 | 4,160 |
| Embedded Memory Bits | 4,160 | — |
| Maximum User I/O Pins | 189 | — |
| Package Type | 240-BFQFP | 240-BQFP (QFP-240) |
| Speed Grade | C7 | C9 (-9 commercial) |
| 工作溫度 | 0C to +85C (commercial) | 0°C to +85°C (commercial) |
| Supply Voltage - Core | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL (per family datasheet) | LVTTL, LVCMOS, PCI, GTL |
| Number of PLLs | 4 (per APEX-20K family datasheet) | 4 |
| Embedded System Blocks (ESBs) | Yes (per APEX-20K family) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | unknown | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | unknown | — |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera Quartus / MAX+PLUS II (per family) | — |
| Series | — | APEX 20K |
| Typical Gates | — | 100,000 |
| Embedded Memory (RAM bits) | — | 53,248 |
| User I/O Pins | — | 189 |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Programming Method | — | In-system SRAM (volatile) |
| Configuration Method | — | Serial/Passive Parallel/Byte-wide JTAG |
| Supply Voltage (VCCINT) | — | [DATA_NEEDED: VCCINT core voltage] |
| Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO I/O voltage] |
| JTAG (IEEE 1149.1) Support | — | Yes |