EP20K400CF672C7 vs EP20K400CF672C8ES Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K400CF672C7 disebabkan oleh Altera dan EP20K400CF672C8ES disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K400CF672C7 EP20K400CF672C8ES
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series APEX-20KC EP20K400
Family APEX 20KC (MultiCore™) APEX 20KC
Logic Elements / Cells 16,640 —
System Gates 400,000 —
Embedded Memory (RAM bits) 212,992 —
Maximum User I/O 488 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value]
Number of I/O Banks 8 —
Kemasan 672-BBGA (FC-FBGA, FineLine BGA) 672-BGA FineLine (FC-FBGA / S-PBGA-B672)
Kiraan Pin 672 —
Core Voltage 1.8 V —
Tegangan Pemberi Arus 2.5 V (I/O reference) —
Process Technology 0.15 µm CMOS 0.15 µm CMOS
Propagation Delay (tPD) 2.5 ns —
Maximum Internal Frequency 375.94 MHz 301.21 MHz
Suhu Operasi 0 °C to +85 °C (Commercial, C-grade) 0°C to 85°C (Commercial)
PLL Count 4 —
Speed Grade -7 —
Jenis Pemasangan Surface Mount (BGA) —
Status RoHS Non-compliant (legacy product) [DATA_NEEDED: not stated in verified data]
Lead-Free Contains lead (legacy BGA finish) —
Logic Cells / Macros — 16,640
System Gates (typical) — 400,000
System Gates (maximum) — 212,992 [DATA_NEEDED: confirm datasheet interpretation]
Bidirectional I/O — 484
Propagation Delay — 2.5 ns
Nominal Supply Voltage — 1.8 V
Supply Voltage Range — 1.71 V to 1.89 V
Logic Family — CMOS
Architecture — MultiCore™ (LUT + Embedded System Block)
Programming Method — JTAG / in-system via configuration memory

Laporan Datasheet & Sumber

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