EP20K400CF672C7 vs EP20K400CF672C8ES 比較
詳細並排比較 EP20K400CF672C7 由 Altera 與 EP20K400CF672C8ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K400CF672C7 | EP20K400CF672C8ES |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20KC | EP20K400 |
| Family | APEX 20KC (MultiCore™) | APEX 20KC |
| Logic Elements / Cells | 16,640 | — |
| System Gates | 400,000 | — |
| Embedded Memory (RAM bits) | 212,992 | — |
| Maximum User I/O | 488 | 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] |
| Number of I/O Banks | 8 | — |
| 封裝 | 672-BBGA (FC-FBGA, FineLine BGA) | 672-BGA FineLine (FC-FBGA / S-PBGA-B672) |
| 腳位數 | 672 | — |
| Core Voltage | 1.8 V | — |
| 供應電壓 | 2.5 V (I/O reference) | — |
| Process Technology | 0.15 µm CMOS | 0.15 µm CMOS |
| Propagation Delay (tPD) | 2.5 ns | — |
| Maximum Internal Frequency | 375.94 MHz | 301.21 MHz |
| 工作溫度 | 0 °C to +85 °C (Commercial, C-grade) | 0°C to 85°C (Commercial) |
| PLL Count | 4 | — |
| Speed Grade | -7 | — |
| 安裝類型 | Surface Mount (BGA) | — |
| RoHS 狀態 | Non-compliant (legacy product) | [DATA_NEEDED: not stated in verified data] |
| Lead-Free | Contains lead (legacy BGA finish) | — |
| Logic Cells / Macros | — | 16,640 |
| System Gates (typical) | — | 400,000 |
| System Gates (maximum) | — | 212,992 [DATA_NEEDED: confirm datasheet interpretation] |
| Bidirectional I/O | — | 484 |
| Propagation Delay | — | 2.5 ns |
| Nominal Supply Voltage | — | 1.8 V |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Logic Family | — | CMOS |
| Architecture | — | MultiCore™ (LUT + Embedded System Block) |
| Programming Method | — | JTAG / in-system via configuration memory |