EP20K600CB652C7ES vs EP20K600CB652C9N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP20K600CB652C7ES disebabkan oleh Altera dan EP20K600CB652C9N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP20K600CB652C7ES EP20K600CB652C9N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family APEX 20KC APEX 20KC
Logic Elements 24,320 24,320
System Gates 600,000 —
Maximum System Gates 1,053,840 —
Embedded Memory Bits 311,296 —
Embedded System Blocks (ESB) 26 —
Maximum User I/O 488 488
User I/O (this package) 488 (652-BGA) —
Supply Voltage - Core 1.71 V to 1.89 V (1.8 V nominal) —
Maximum Internal Clock Frequency 1666.6 MHz —
Propagation Delay 1.6 ns —
Process Technology 0.15 µm CMOS 0.15 micron all-layer copper CMOS
Suhu Operasi 0 °C to +85 °C (commercial) 0 C to 85 C (commercial)
Package Type 652-ball FineLine BGA —
JEDEC Package Code S-PBGA-B652 —
Configuration Modes Passive Serial, Passive Parallel, JTAG —
JTAG Boundary Scan IEEE 1149.1 compliant —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: rohs status]
PLLs 4 —
Jenis Pemasangan Surface Mount (BGA) Surface Mount (BGA)
Device Type — Loadable PLD (FPGA)
Typical Gates — 600,000
Kemasan — BGA-652 (652-ball FineLine BGA, 45 x 45 mm, 1.27 mm pitch)
Core Supply Voltage — 1.8 V
Speed Grade — C9 (~1.48 ns propagation delay)
Architecture — MultiCore LUT + embedded system memory (ESB)
On-chip Memory — Embedded system memory blocks (dual-port RAM, FIFO)
Configuration Interface — JTAG (IEEE 1149.1) and serial/PROM configuration
Pin/Pin Compatibility — Pin-compatible with APEX 20KE devices of same package
Toolchain — Altera/Intel Quartus II (legacy APEX support)
Aras MSL — [DATA_NEEDED: MSL level]

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