EP2A25F672C7 vs EP2A25F672C9 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A25F672C7 disebabkan oleh Altera dan EP2A25F672C9 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP2A25F672C7 EP2A25F672C9
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND NRND
Product Family APEX II —
Logic Elements 25,000 —
Maximum System Gates 1,650,000 —
Maximum RAM Bits 422,976 —
User I/O Count 492 —
Kemasan 672-ball FCBGA (FineLine BGA) 672-ball FCBGA (FineLine BGA)
Process Technology 0.15-um all-layer copper, up to 8 metal layers 0.15 µm all-layer copper, up to 8 metal layers
Supply Voltage (Core) 1.5 V —
LVDS Data Rate 1 Gbps per channel (True-LVDS) —
I/O Standards Supported LVDS, LVPECL, PCML, HyperTransport —
Suhu Operasi 0C to +85C (Commercial) 0°C to 85°C (Commercial)
Speed Grade -7 —
Configuration Mode Passive Serial, Passive Parallel, JTAG —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED]
Embedded System Blocks (ESB) Yes - RAM, ROM, CAM, multiplier support —
Family — APEX II
Logic Elements (LE) — Approximately 25,000
Macro Cells — 2432
User I/O — 492
Package Dimensions — 27 mm x 27 mm
Ball Pitch — 1.0 mm
Logic Family — CMOS
Propagation Delay — 1.69 ns
Tegangan Pemberi Arus — [DATA_NEEDED: core VCC voltage]
I/O Standards — LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V)
Configuration — Passive Serial, Passive Parallel Synchronous, JTAG
Embedded Memory — ESBs for dual-port RAM, ROM, FIFO
Jenis Pemasangan — Surface Mount

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