EP2A25F672C9 vs EP2A25F672C9N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP2A25F672C9 disebabkan oleh Altera dan EP2A25F672C9N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP2A25F672C9 EP2A25F672C9N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup NRND Obsolete
Family APEX II APEX II
Logic Elements (LE) Approximately 25,000 —
Macro Cells 2432 —
User I/O 492 —
Kemasan 672-ball FCBGA (FineLine BGA) 672-ball FineLine BGA (F672), 27 × 27 mm, 1.00 mm pitch
Package Dimensions 27 mm x 27 mm —
Ball Pitch 1.0 mm —
Process Technology 0.15 µm all-layer copper, up to 8 metal layers 0.15 µm all-layer copper, up to 8 metal layers
Logic Family CMOS CMOS
Propagation Delay 1.69 ns 2.23 ns
Suhu Operasi 0°C to 85°C (Commercial) 0 °C to +85 °C (commercial, C9 grade)
Tegangan Pemberi Arus [DATA_NEEDED: core VCC voltage] —
I/O Standards LVTTL, LVCMOS, PCI, LVDS, HSTL, SSTL (multi-voltage 1.5/1.8/2.5/3.3 V) —
Configuration Passive Serial, Passive Parallel Synchronous, JTAG —
Embedded Memory ESBs for dual-port RAM, ROM, FIFO Enhanced System Blocks (ESBs) for dual-port RAM
Jenis Pemasangan Surface Mount Surface Mount (BGA)
Status RoHS [DATA_NEEDED] Compliant (per distributor listings)
Logic Elements / Cells — 24320
System Gates — Approx. 900000
Maximum User I/O — 492
Operating Frequency — 236 MHz
Core Supply Voltage (VCCINT) — 1.425 V to 1.575 V (nominal 1.5 V)
Seated Height (max) — 2.100 mm
I/O Standards Supported — LVTTL, LVCMOS, PCI, GTL+, SSTL-2/3, LVDS, LVPECL, PCML, HyperTransport
LVDS Data Rate — Up to 1 Gbps (True-LVDS)
Configuration Interface — Serial / Parallel PROM, JTAG, passive parallel (enhanced)
Design Software — Quartus II (v5.1 or later)

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