EP3CLS100U484C7N vs EP3C80U484C7N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP3CLS100U484C7N disebabkan oleh Altera dan EP3C80U484C7N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP3CLS100U484C7N | EP3C80U484C7N |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Aktif |
| Device Family | Cyclone III LS | — |
| Logic Elements | 100,448 | — |
| Embedded Memory | 4,451,328 bits (4.4 Mbit) | 2,810,880 bits |
| User I/O Pins | 278 | — |
| Kemasan | 484-ball FBGA (UBGA) | — |
| Process Technology | 65 nm TSMC low-power | 65 nm |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | 7 (commercial) | — |
| Maximum Internal Frequency | 437.5 MHz | — |
| Suhu Operasi | 0C to +85C (commercial) | — |
| Configuration Mode | AS / AP / PS / JTAG | — |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| I/O Banks | 8 | — |
| Jenis Pemasangan | Surface Mount (BGA) | — |
| Status RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Product Family | — | Cyclone III |
| Logic Cell Count | — | 81,264 cells |
| User I/O Count | — | 295 I/O |
| Frekuensi Klock Maksimum | — | 437.5 MHz |
| Tegangan Pemberi Arus | — | 1.2 V |
| Terminal Count | — | 484 terminals |
| Package Code | — | FBGA |
| Package Description | — | 484-UBGA |
| Package Shape | — | Rectangular |
| Terminal Form | — | Ball |
| Temperature Grading | — | Other |
| Gaya Pemasangan | — | Surface Mount |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |