EP3CLS100U484C7N vs EP3C80U484C7N 比較
詳細並排比較 EP3CLS100U484C7N 由 Altera 與 EP3C80U484C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3CLS100U484C7N | EP3C80U484C7N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Device Family | Cyclone III LS | — |
| Logic Elements | 100,448 | — |
| Embedded Memory | 4,451,328 bits (4.4 Mbit) | 2,810,880 bits |
| User I/O Pins | 278 | — |
| 封裝 | 484-ball FBGA (UBGA) | — |
| Process Technology | 65 nm TSMC low-power | 65 nm |
| Core Supply Voltage | 1.2 V | — |
| Speed Grade | 7 (commercial) | — |
| Maximum Internal Frequency | 437.5 MHz | — |
| 工作溫度 | 0C to +85C (commercial) | — |
| Configuration Mode | AS / AP / PS / JTAG | — |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: DSP block count] | — |
| PLLs | [DATA_NEEDED: PLL count] | — |
| I/O Banks | 8 | — |
| 安裝類型 | Surface Mount (BGA) | — |
| RoHS 狀態 | Compliant | [DATA_NEEDED: RoHS status] |
| Lead-Free | Yes | — |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Product Family | — | Cyclone III |
| Logic Cell Count | — | 81,264 cells |
| User I/O Count | — | 295 I/O |
| 最大時脈頻率 | — | 437.5 MHz |
| 供應電壓 | — | 1.2 V |
| Terminal Count | — | 484 terminals |
| Package Code | — | FBGA |
| Package Description | — | 484-UBGA |
| Package Shape | — | Rectangular |
| Terminal Form | — | Ball |
| Temperature Grading | — | Other |
| 安裝方式 | — | Surface Mount |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |