EP610LC-25 vs EP610LC-30 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610LC-25 disebabkan oleh Intel dan EP610LC-30 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP610LC-25 | EP610LC-30 |
|---|---|---|
| Merek | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic EPLD | Classic EPLD (EP610) |
| Macrocells | 16 | — |
| Logic Array Blocks (LABs) | 4 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | 100 MHz | — |
| Pipelined Data Rate | Up to 100 MHz | up to 100 MHz |
| Tegangan Pemberi Arus | 5 V ±5% | — |
| Technology | CMOS | CMOS EPROM (UV-erasable) |
| Programmability | UV-erasable (windowed package) | — |
| Kemasan | PLCC-28 | 24-pin CERDIP / PDIP |
| Suhu Operasi | 0C to +70C (commercial) | 0 C to +70 C (commercial) / -55 C to +125 C (military) |
| Jenis Pemasangan | Surface Mount | Through-Hole |
| I/O Pins | [DATA_NEEDED: exact I/O count] | — |
| Status RoHS | [DATA_NEEDED] | [DATA_NEEDED: RoHS status] |
| Macro Cells | — | 16 |
| Logic Gates | — | Equivalent to 300 gates (typical) |
| Pin-to-Pin Delay (tPD) | — | 30 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programming Voltage (VPP) | — | 13 V nominal |
| Erase/Program Cycles | — | 1000 typical |
| Jenis Output | — | CMOS tri-state (programmable) |
| Logic Compatibility | — | TTL and CMOS |
| Turbo Mode | — | Yes (registered path bypass) |