EP910LC-40H vs EP910ILC-25 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP910LC-40H disebabkan oleh Altera dan EP910ILC-25 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EP910LC-40H | EP910ILC-25 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | Classic EPLD (EP910) | EP910 Classic EPLD |
| Macro Cells | 24 | — |
| Usable Gates | 450 | — |
| Logic Elements | 24 macro cells / expandable to 48 via expander terms | — |
| Propagation Delay (tPD) | 40 ns max | 25 ns |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Supply Current (ICC) | Low-power CMOS, typical ICC < 100 mA | — |
| Technology | CMOS, UV-erasable EPROM | CMOS EPROM (UV-erasable) |
| Kemasan | 40-pin Ceramic DIP (CDIP-40), JEDEC standard | 44-pin JLCC (windowed ceramic) |
| Jenis Pemasangan | Through-Hole (THT) | Surface Mount |
| Suhu Operasi | -40C to +85C (industrial) [DATA_NEEDED: confirm exact temp grade] | -40C to +85C (industrial) |
| Speed Grade | -40 (40 ns tPD) | — |
| Programming Method | UV-erase + EPROM program, ~100 erase cycles | — |
| I/O Pins | [DATA_NEEDED: I/O count - datasheet indicates 36 user I/O typical] | — |
| Status RoHS | [DATA_NEEDED: not confirmed from datasheet - non-RoHS likely given vintage ceramic DIP] | non_compliant (ceramic windowed package) |
| Macrocells | — | 24 |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Tegangan Pemberi Arus | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Status Lingkungan Hidup | — | Obsolete - last time buy was late 1990s |