EPM3064AT100-10N vs EPM3064ATC100-10NA Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064AT100-10N disebabkan oleh Altera dan EPM3064ATC100-10NA disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Intel
EPM3064ATC100-10NA - MAX 3000A CPLD, 64 Macrocells, 10ns, TQFP-100 | Intel (Altera)
EPM3064ATC100-10NA ✓ AktifPengandingan Spesifikasi
| Parametr | EPM3064AT100-10N | EPM3064ATC100-10NA |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | Aktif |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | 64 |
| Logic Array Blocks (LABs) | 4 | 4 |
| Usable Gates | 1,250 | 1,250 |
| User I/O Pins | 66 | — |
| Speed Grade | -10 (10 ns pin-to-pin delay) | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Bank Voltage | 3.3 V | — |
| 5 V Tolerant Inputs | Yes (via clamping diodes) | — |
| Configuration Memory | EEPROM (non-volatile) | Non-volatile EEPROM |
| Programming Interface | JTAG (IEEE Std. 1149.1) with pin-locking | — |
| ISP Compliance | IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | IEEE Std. 1149.1 compliant | — |
| Kemasan | TQFP-100 (T100), 14 mm x 14 mm | TQFP-100 (0.5 mm pitch) |
| Operating Temperature (Commercial) | 0C to +70C | — |
| Status RoHS | [DATA_NEEDED: RoHS compliance status] | — |
| Lead-Free | [DATA_NEEDED: lead-free finish] | — |
| User I/Os | — | 66 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Operating Frequency | — | [DATA_NEEDED: fMAX in MHz] |
| MultiVolt I/O Voltages | — | 2.5 V / 3.3 V / 5.0 V |
| In-System Programming | — | IEEE Std. 1532 compliant |
| Boundary-Scan Test | — | IEEE Std. 1149.1 (JTAG) |
| Suhu Operasi | — | 0C to +70C (commercial) |
| Lead-Free / RoHS | — | Yes (NA suffix) |