EPM3064ATI44-10N vs EPM3064ATI44-10 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3064ATI44-10N disebabkan oleh Altera dan EPM3064ATI44-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM3064ATI44-10N | EPM3064ATI44-10 |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | NRND |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | — |
| Usable Gates | 1250 | — |
| User I/Os | 34 | — |
| Dedicated Inputs | 4 | — |
| Logic Blocks | 4 | — |
| Pin-to-Pin Delay | 10 ns (-10 speed grade) | — |
| Maximum Frequency (fMAX) | 100 MHz | — |
| Programmable Type | In-System Programmable (EEPROM) | In-System Programmable (ISP), EEPROM-based |
| ISP Interface | IEEE Std. 1149.1 (JTAG) | — |
| ISP Standard Compliance | IEEE Std. 1532 | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 2.5 V (MultiVolt) | — |
| Suhu Operasi | -40C to +85C (Industrial, "N" suffix) | -40C to +85C (Industrial) |
| Kemasan | 44-pin TQFP | TQFP-44 (10x10 mm, 0.8 mm pitch) |
| Process Technology | CMOS EEPROM | CMOS, EEPROM |
| Boundary-Scan Test | Built-in (JTAG) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Lead-Free Status | Contains Lead (per digchip datasheet excerpt) | — |
| Status RoHS | Non-Compliant (per digchip datasheet excerpt) | Non-Compliant (contains lead, per DigiChip listing) |
| Number of Macrocells | — | 64 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Number of Usable Gates | — | 1,250 |
| Number of User I/O Pins | — | 34 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5.0 V tolerant (MultiVolt I/O) |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| ISP Standard | — | IEEE Std. 1532 |
| Lead Free Status | — | Contains Lead |
| Programming Cycles | — | [DATA_NEEDED: typical program/erase endurance] |