EPM3512AQC210-10 vs EPM3512AFC256-10 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM3512AQC210-10 disebabkan oleh Altera dan EPM3512AFC256-10 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM3512AQC210-10 | EPM3512AFC256-10 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Macrocells | 512 | — |
| Logic Array Blocks (LABs) | 16 (32 macrocells each) | 16 |
| Maximum User I/O Pins | 172 | — |
| Speed Grade | -10 (10 ns tPD) | — |
| Pin-to-Pin Propagation Delay (tPD1, max) | 10 ns | — |
| Maximum Operating Frequency (fCNT) | 125 MHz | — |
| Supply Voltage - Core (VCCINT) | 3.3 V | — |
| Supply Voltage - I/O (VCCIO) | 3.3 V or 2.5 V | — |
| Input Voltage Tolerance | 5.0 V tolerant | — |
| Programmable Technology | EEPROM (in-system programmable) | CMOS EEPROM |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Kemasan | PQFP-210 | 256-pin FBGA |
| Suhu Operasi | 0C to +70C (commercial) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: rohs_compliance_status] | unknown |
| Macrocells | — | 512 |
| Usable Gates | — | 10,000 |
| Maximum I/O Pins | — | 208 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 87 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 5-V tolerant |
| In-System Programmability | — | Yes (IEEE Std. 1149.1 JTAG / IEEE Std. 1532) |
| Gambaran Suhu Operasi | — | [DATA_NEEDED: industrial/commercial operating temperature range] |
| Kiraan Pin | — | 256 |
| Architecture | — | MAX (Multiple Array matriX) EEPROM-based |