EPM5032JC-20 vs EPM5032LC-20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5032JC-20 disebabkan oleh Altera dan EPM5032LC-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5032JC-20 EPM5032LC-20
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Type UV-erasable Programmable Logic Device (PLD) EPLD / CPLD (One-Time Programmable / UV-Erasable)
Family MAX 5000 —
Macrocells 32 32
Logic Array Blocks (LABs) 1 —
Product Terms (P-terms) 320 —
Propagation Delay (tPD) 20 ns 20 ns
Frekuensi Klock Maksimum 62.5 MHz —
Setup Time 10 ns —
I/O Lines 16 (bidirectional) —
Dedicated Inputs 8 7
Total Inputs 24 24
Kemasan 68-pin JLCC (windowed ceramic) LCC-28 (Plastic Leaded Chip Carrier, J-lead)
Process Technology CMOS —
Erase Method UV (12V VPP + ultraviolet exposure) —
Programming Voltage (VPP) 12 V —
Architecture PAL-type AND-OR array with PIA interconnect —
Status Lingkungan Hidup Obsolete (legacy Altera MAX 5000) —
Device Family — MAX 5000
Usable Gates — 600 gates
Logic Blocks (LABs) — 1
Speed Grade — -20 (20 ns pin-to-pin)
Maximum Frequency — 71.4 MHz
Supply Voltage (VCC) — 5 V ±5%
Suhu Operasi — 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants)
Bidirectional I/O Pins — 16
Output Functions — 16
Product Terms per Output — 16
Programmable Interconnect — Programmable Interconnect Array (PIA)
Jenis Pemasangan — Surface Mount
Status RoHS — [DATA_NEEDED: RoHS status]
Aras MSL — [DATA_NEEDED: MSL]

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