EPM5032JC-20 vs EPM5032PC-20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5032JC-20 disebabkan oleh Altera dan EPM5032PC-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM5032JC-20 | EPM5032PC-20 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Product Type | UV-erasable Programmable Logic Device (PLD) | — |
| Family | MAX 5000 | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 1 | — |
| Product Terms (P-terms) | 320 | — |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Frekuensi Klock Maksimum | 62.5 MHz | 62.5 MHz |
| Setup Time | 10 ns | — |
| I/O Lines | 16 (bidirectional) | — |
| Dedicated Inputs | 8 | 24 |
| Total Inputs | 24 | — |
| Kemasan | 68-pin JLCC (windowed ceramic) | PDIP-28 (Plastic DIP, 28-pin) |
| Process Technology | CMOS | — |
| Erase Method | UV (12V VPP + ultraviolet exposure) | — |
| Programming Voltage (VPP) | 12 V | — |
| Architecture | PAL-type AND-OR array with PIA interconnect | PAL-type macrocells with Programmable Interconnect Array (PIA) |
| Status Lingkungan Hidup | Obsolete (legacy Altera MAX 5000) | — |
| Device Family | — | MAX 5000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Programming Type | — | OTP (One-Time Programmable) |
| Usable Gates | — | 600 |
| Logic Blocks | — | 2 Logic Array Blocks |
| Product Terms | — | 320 |
| Bidirectional I/O Lines | — | 16 |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Technology | — | CMOS, 0.65 um process |
| Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Jenis Pemasangan | — | Through-Hole |
| Status RoHS | — | [DATA_NEEDED: RoHS status] |