EPM5064LC-2 vs EPM5064LI Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5064LC-2 disebabkan oleh Altera dan EPM5064LI disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5064LC-2 EPM5064LI
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 —
Product Type CPLD (Complex Programmable Logic Device) —
Macrocells 64 64
Logic Array Blocks (LABs) 4 4
Logic Elements per LAB 16 —
Number of Inputs 36 (7 dedicated + 28 I/O) —
Number of I/O Pins 28 —
Number of Flip-Flops 28 —
Propagation Delay (tPD) 45 ns 55 ns (typical)
Maximum Internal Frequency 40 MHz —
Process Technology CMOS, OTP EPROM (UV-erasable base) 1-micron EPIC CMOS
Programmable Polarity Yes —
Programmable Output Enable Yes, per macrocell —
Supply Voltage (VCC) 4.75 V to 5.25 V (5 V nominal) 4.5 V to 5.5 V
Suhu Operasi -40 C to +85 C (commercial LC grade) [DATA_NEEDED: explicit min/max in source] —
Kemasan PLCC-44 (J-Lead, plastic) —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: not specified in source] [DATA_NEEDED: confirm RoHS status - legacy Altera part]
Programming Method Altera byte-wide / JTAG programmer —
Family — MAX 5000
Device Type — CPLD (Complex Programmable Logic Device)
Number of Terminals — 44
Package Code — QCCJ (PLCC-44, J-bend)
Package Shape — Square
Configuration Memory — UV-Erasable / OTP (EPROM-based)
Operating Temperature Grade — Industrial
Frekuensi Klock Maksimum — 33.3 MHz
I/O Pins — 28 bidirectional
Dedicated Inputs — 7
Total User Inputs — 36
Latch-up Immunity — 500 mA typical at 125 C

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