EPM5130JC-1 vs EPM5128JC-2 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5130JC-1 disebabkan oleh Altera dan EPM5128JC-2 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5130JC-1 EPM5128JC-2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Type CPLD (Complex Programmable Logic Device) —
Family MAX 5000 MAX 5000
Usable Gates 2,500 gates —
Macrocells 128 128
Logic Array Blocks (LABs) 8 —
Maximum Operating Frequency 62.5 MHz —
Propagation Delay (tPD) 40 ns 45 ns (max)
Supply Voltage (VCC) 5 V —
Dedicated Inputs 19 7
I/O Pins 80 —
Kemasan 84-pin PLCC (J-lead) 68-pin CQCC (Ceramic Quad Flat Pack), windowed
Jenis Pemasangan Surface Mount Surface Mount
Programming Technology UV-erasable EPROM (quartz window) —
Process Technology CMOS CMOS
Suhu Operasi 0C to +70C (commercial) [DATA_NEEDED: operating temperature range]
External Clock Pins 1 global clock —
Status RoHS [DATA_NEEDED: RoHS compliance] Non-compliant (ceramic windowed package contains lead-bearing solder)
Device Type — UV-Erasable Programmable Logic Device (PLD)
Maximum Counter Frequency (fCNT) — 50 MHz
Input Setup Time (tSU) — 7.5 ns
Output Drive Current (IOH/IOL) — 12 mA DC
Tegangan Pemberi Arus — 5 V (nominal)
Program/Erase Method — UV (ceramic window)
Erase/Program Cycles — [DATA_NEEDED: minimum erase/program cycles]
Logic Family — TTL-compatible I/O

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