EPM5192AGC-20 vs EPM5192AGC Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192AGC-20 disebabkan oleh Intel dan EPM5192AGC disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192AGC-20 EPM5192AGC
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000 (High-Speed, High-Density MAX 5000 Devices)
Device Type EPLD (EEPLD, UV-erasable) UV-Erasable / OTP Complex PLD (EPLD)
Macrocells 192 192
Usable Gates 12,000 —
Propagation Delay (tPD) 20 ns —
Counter Frequency (fCNT) 100 MHz (max) —
Supply Voltage (VCC) 5 V (4.75 V to 5.25 V) —
Logic Array Blocks (LABs) 8 —
Dedicated I/O Pins 96 —
Programming Interface IEEE 1149.1 JTAG —
In-System Programmability Yes (5 V ISP) —
Security Bit Yes (pattern read-back protected) Programmable security bit (per MAX 5000 family)
Kemasan PGA-132 (ceramic windowed, 'GC') 84-pin Ceramic PGA (Pin Grid Array, windowed or windowless)
Jenis Pemasangan Through-hole (PGA socket) Through-hole (Pin Grid Array)
Suhu Operasi 0C to 70C (commercial) [DATA_NEEDED: operating temperature range]
Status RoHS [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] Non-compliant (ceramic PGA contains lead; legacy military/industrial grade)
Logic Density — High-density (per MAX 5000 family definition)
Architecture — CMOS, sum-of-products with macrocell output logic
Process Technology — CMOS
Speed Grade Suffix — C (commercial grade; specific pin-to-pin delay varies by base number -15/-20)
Programmability — UV-erasable (windowed package) / One-Time-Programmable (windowless variant)
Tegangan Pemberi Arus — [DATA_NEEDED: VCC nominal and tolerance]
Lifecycle — Obsolete (legacy Altera MAX 5000 family; maintained for long-lifecycle programs)
Programming Support — MAX+PLUS II legacy toolchain / Altera-compatible third-party programmers

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