EPM5192AJC84-20 vs EPM5192AGC84-20 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192AJC84-20 disebabkan oleh Altera dan EPM5192AGC84-20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Altera
EPM5192AJC84-20 - 192-Macrocell UV PLD, 33ns, 84-Pin J-Lead | Altera
EPM5192AJC84-20 Obsolete
Pengandingan Spesifikasi
| Parametr | EPM5192AJC84-20 | EPM5192AGC84-20 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 |
| Device Type | UV-erasable/OTP Complex PLD (CPLD) | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 33 ns (speed grade -20) | — |
| Frekuensi Klock Maksimum | 66.7 MHz | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V | — |
| Dedicated Inputs | 7 | 7 |
| User I/O Lines | 64 | — |
| Process Technology | CMOS, UV-erasable EEPROM | CMOS |
| Kemasan | 84-pin PLCC J-Lead (WQCCJ, J84) | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Operating Temperature Grade | Commercial | Commercial |
| Jenis Pemasangan | Surface Mount (J-Lead) | Through-Hole (Pin Grid Array socket) |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Programming Tool | Altera MAX+PLUS II / Quartus (legacy) | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free status] | — |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| User I/O Pins | — | 64 |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Package Code | — | WPGA |
| Erasure Method | — | UV-Erasable (with OTP window) |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: VCC range] |
| I/O Standard | — | 5V CMOS / TTL compatible |