EPM5192GI84 vs EPM5192LI84 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192GI84 disebabkan oleh Altera dan EPM5192LI84 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192GI84 EPM5192LI84
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 —
Device Type UV-Erasable / OTP Complex PLD (CPLD) —
Macrocells 192 —
Logic Array Blocks [DATA_NEEDED: number of LABs] —
Kemasan 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) —
Package Code WPGA —
Operating Voltage (VCC) 5 V (typical) —
I/O Logic Compatibility TTL —
Temperature Grade Industrial —
Programmable Flip-Flop Modes D, T, JK, SR —
Programmability UV-erasable (windowed) / OTP —
Programming File Format JEDEC map via MAX+PLUS II / A+PLUS —
Propagation Delay [DATA_NEEDED: tPD in ns] —
Max User I/O Pins [DATA_NEEDED: usable I/O count for this package] —
Gambaran Suhu Operasi -40 C to +85 C (industrial) -40 °C to +85 °C (industrial)
Jenis Pemasangan Through-Hole (PGA socket or PCB pin/peg) Surface Mount (socket-compatible)
Status RoHS [DATA_NEEDED: most legacy PGA parts are non-RoHS] [DATA_NEEDED: RoHS compliance status]
Lead-Free [DATA_NEEDED: legacy part, likely contains lead] —
Number of Terminals 84 —
Terminal Form PIN/PEG —
Package Shape SQUARE —
Device Family — MAX 5000
Product Type — UV-Erasable/OTP Complex PLD (CPLD)
Usable Gates — 3,750 gates
Macro Cells — 192
Maximum Toggle Frequency — 40 MHz
Pin-to-Pin Delay (tPD) — 25 ns
Supply Voltage (VCC) — 5 V (single supply)
User I/O Pins — 64 (max)
Package Type — 84-pin PLCC (J-lead, package code J84/QCCJ)
Configuration Memory — OTP / UV-erasable EPROM
Programming Method — Stand-alone programmer (no JTAG on LI84 OTP variant)
Logic Compatibility — TTL-compatible I/O

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