EPM5192GI84 vs EPM5192LI84 比較
詳細並排比較 EPM5192GI84 由 Altera 與 EPM5192LI84 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192GI84 | EPM5192LI84 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable / OTP Complex PLD (CPLD) | — |
| Macrocells | 192 | — |
| Logic Array Blocks | [DATA_NEEDED: number of LABs] | — |
| 封裝 | 84-pin PGA (WPGA, square, through-hole, pin/peg terminals) | — |
| Package Code | WPGA | — |
| Operating Voltage (VCC) | 5 V (typical) | — |
| I/O Logic Compatibility | TTL | — |
| Temperature Grade | Industrial | — |
| Programmable Flip-Flop Modes | D, T, JK, SR | — |
| Programmability | UV-erasable (windowed) / OTP | — |
| Programming File Format | JEDEC map via MAX+PLUS II / A+PLUS | — |
| Propagation Delay | [DATA_NEEDED: tPD in ns] | — |
| Max User I/O Pins | [DATA_NEEDED: usable I/O count for this package] | — |
| 工作溫度範圍 | -40 C to +85 C (industrial) | -40 °C to +85 °C (industrial) |
| 安裝類型 | Through-Hole (PGA socket or PCB pin/peg) | Surface Mount (socket-compatible) |
| RoHS 狀態 | [DATA_NEEDED: most legacy PGA parts are non-RoHS] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: legacy part, likely contains lead] | — |
| Number of Terminals | 84 | — |
| Terminal Form | PIN/PEG | — |
| Package Shape | SQUARE | — |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Usable Gates | — | 3,750 gates |
| Macro Cells | — | 192 |
| Maximum Toggle Frequency | — | 40 MHz |
| Pin-to-Pin Delay (tPD) | — | 25 ns |
| Supply Voltage (VCC) | — | 5 V (single supply) |
| User I/O Pins | — | 64 (max) |
| Package Type | — | 84-pin PLCC (J-lead, package code J84/QCCJ) |
| Configuration Memory | — | OTP / UV-erasable EPROM |
| Programming Method | — | Stand-alone programmer (no JTAG on LI84 OTP variant) |
| Logic Compatibility | — | TTL-compatible I/O |