EPM7160STC100-6N vs EPM7160STC100-10 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM7160STC100-6N disebabkan oleh Altera dan EPM7160STC100-10 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Intel
EPM7160STC100-10 EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel

EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel

EPM7160STC100-10 ⚠ Bahagian terakhir untuk beli

Pengandingan Spesifikasi

Parametr EPM7160STC100-6N EPM7160STC100-10
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Masa Terakhir Dibeli
Family MAX 7000S MAX 7000S
Logic Type CPLD (Complex Programmable Logic Device) —
Macro Cells 160 160
User I/Os 84 84
Gates (typical) 3,200 —
Propagation Delay (tPD) 6 ns —
Internal Frequency 149.3 MHz (max) —
Tegangan Pemberi Arus 5 V —
Program Memory Type EEPROM (non-volatile) —
In-System Programmability Yes (IEEE 1149.1 JTAG) Yes (IEEE 1149.1 JTAG)
Kemasan TQFP-100 (T100) 100-pin TQFP
Package Code LFQFP, S Gull-Wing —
Suhu Operasi 0 °C to +70 °C (Commercial) 0 C to +70 C (commercial)
Logic Family CMOS —
I/O Banks [DATA_NEEDED: I/O bank count] —
Status RoHS [DATA_NEEDED: RoHS compliance] Non-RoHS (legacy Altera part; -10N variant is RoHS)
Lead-Free [DATA_NEEDED: lead-free status] —
Device Type — CPLD (Complex Programmable Logic Device)
Usable Gates — 3,200
Logic Elements — 160 macrocells / 10 Logic Array Blocks
Supply Voltage (VCC) — 5.0 V (4.75 V - 5.25 V)
Propagation Delay (tPD1) — 10 ns
Global Clock Setup Time — 6 ns
Internal Counter Frequency — 100 MHz
Technology — CMOS, EEPROM-based
Jenis Pemasangan — Surface Mount

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