EPM7160STC100-6N vs EPM7160STC100-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM7160STC100-6N sa pamamagitan ng Altera at EPM7160STC100-10 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM7160STC100-10 - MAX 7000S CPLD, 160 Macrocells, 100-pin TQFP | Intel
EPM7160STC100-10 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM7160STC100-6N | EPM7160STC100-10 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | MAX 7000S | MAX 7000S |
| Logic Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 160 | 160 |
| User I/Os | 84 | 84 |
| Gates (typical) | 3,200 | — |
| Propagation Delay (tPD) | 6 ns | — |
| Internal Frequency | 149.3 MHz (max) | — |
| Volte ng Pagbibigay | 5 V | — |
| Program Memory Type | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | Yes (IEEE 1149.1 JTAG) |
| Packhaging | TQFP-100 (T100) | 100-pin TQFP |
| Package Code | LFQFP, S Gull-Wing | — |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0 C to +70 C (commercial) |
| Logic Family | CMOS | — |
| I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | Non-RoHS (legacy Altera part; -10N variant is RoHS) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 3,200 |
| Logic Elements | — | 160 macrocells / 10 Logic Array Blocks |
| Supply Voltage (VCC) | — | 5.0 V (4.75 V - 5.25 V) |
| Propagation Delay (tPD1) | — | 10 ns |
| Global Clock Setup Time | — | 6 ns |
| Internal Counter Frequency | — | 100 MHz |
| Technology | — | CMOS, EEPROM-based |
| Uri ng Pagpapasok | — | Surface Mount |