EPM9320RC208-10 vs EPM9320RC208-15N Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9320RC208-10 disebabkan oleh Altera dan EPM9320RC208-15N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM9320RC208-10 | EPM9320RC208-15N |
|---|---|---|
| Merek | Altera | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | NRND | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Kemasan | 208-pin RQFP (RC) | 208-pin RQFP (PowerQuad Flat Pack) |
| Suhu Operasi | Commercial (0C to +70C) - 'C' suffix | — |
| Tegangan Pemberi Arus | 5 V | 5.0 V |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | — |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| Status RoHS | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| Tingkat sensitiviti Air Nama (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Macro Cells | — | 320 |
| Flip-Flops | — | 484 |
| Configurable I/O Lines | — | 128 |
| Propagation Delay (tPD) | — | 15 ns |
| Frekuensi Klock Maksimum | — | 117.6 MHz |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| Configuration Technology | — | CMOS EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Terminal Pitch | — | 0.5 mm |
| Gambaran Suhu Operasi | — | 0C to +70C (commercial) |
| Jenis Pemasangan | — | Surface Mount |
| Packaging | — | Tray |