EPM9320RC208-10 vs EPM9320RC208-15N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320RC208-10 sa pamamagitan ng Altera at EPM9320RC208-15N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320RC208-10 | EPM9320RC208-15N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | — |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Packhaging | 208-pin RQFP (RC) | 208-pin RQFP (PowerQuad Flat Pack) |
| Temperature na Operasyon | Commercial (0C to +70C) - 'C' suffix | — |
| Volte ng Pagbibigay | 5 V | 5.0 V |
| Speed Grade | -10 | — |
| Programming Interface | JTAG (ByteBlaster/BitBlaster) | — |
| Non-volatile Configuration | Yes (EPROM/EEPROM based) | — |
| Design Tool Support | MAX+PLUS II, Quartus (legacy) | — |
| Tindminan RoHS | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | 3 (168 Hours) | — |
| Lead Time | 1-7 days (per fpgalink listing) | — |
| Macro Cells | — | 320 |
| Flip-Flops | — | 484 |
| Configurable I/O Lines | — | 128 |
| Propagation Delay (tPD) | — | 15 ns |
| Maksimum na Taktiko ng Oras | — | 117.6 MHz |
| I/O Voltage Compatibility | — | 3.3 V or 5 V |
| Configuration Technology | — | CMOS EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Terminal Pitch | — | 0.5 mm |
| Hanay ng Temperature na Operasyon | — | 0C to +70C (commercial) |
| Uri ng Pagpapasok | — | Surface Mount |
| Packaging | — | Tray |