EPM9560RC208-13 vs EPM9560RC208-18 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560RC208-13 disebabkan oleh Altera dan EPM9560RC208-18 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Altera
EPM9560RC208-18 EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 - MAX 9000 CPLD 560 Macro Cells 5V | Altera

EPM9560RC208-18 ✗ Akhir Hayat

Pengandingan Spesifikasi

Parametr EPM9560RC208-13 EPM9560RC208-18
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Akhir Hidup
Device Family MAX 9000 EPLD MAX 9000 (EPM9560)
Macrocells 560 560 macrocells
Usable Gates 12,000 12,000 gates
Logic Array Blocks (LABs) 20 —
User I/O Pins 208 —
Kemasan 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
Package Code RC208 —
Speed Grade -13 (13 ns pin-to-pin) —
Propagation Delay (tPD) 13 ns 18 ns (speed grade -18)
Frekuensi Klock Maksimum 125 MHz —
Tegangan Pemberi Arus 5.0 V 5 V
Configuration Technology EEPROM (non-volatile) —
Programming Interface IEEE 1149.1 JTAG —
Gambaran Suhu Operasi 0C to +70C (commercial) —
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Lead-Free Status [DATA_NEEDED: lead-free status] —
Aras MSL [DATA_NEEDED: MSL level] —
Logic Type — EEPROM-based Complex Programmable Logic Device (CPLD)
Maximum Operating Frequency — 117.6 MHz (family -15 grade reference)
I/O Voltage Compatibility — 3.3 V or 5 V
User I/O Lines — 149 I/O lines
Flip-Flops — 772 flip-flops
Package JESD-30 Code — S-PQFP-G208
Configuration Memory — EEPROM (non-volatile, no external config PROM)
Technology — CMOS
Suhu Operasi — [DATA_NEEDED: operating temperature range]
Status Lingkungan Hidup — EOL / mature (per Altera product discontinuance notice)

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