EPM9560WC208-20 vs EPM9560RC208-20N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560WC208-20 disebabkan oleh Altera dan EPM9560RC208-20N disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM9560WC208-20 EPM9560RC208-20N
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 9000 —
Device Type CPLD (EPLD) —
Macrocells 560 560
Logic Array Blocks (LABs) 35 —
User I/O Pins 149 149
Maximum Propagation Delay (tPD) 23.6 ns —
Kemasan PQFP-208 (RQFP/WQFP) 208-pin RQFP (PowerQuad Flat Pack)
Process Technology CMOS, EEPROM-based —
Supply Voltage (VCCINT) 5 V (typical, see datasheet) —
I/O Voltage (VCCIO) 3.3 V or 5 V (multi-voltage I/O) —
In-System Programmability Yes, JTAG BST (IEEE 1149.1) Yes, via IEEE Std. 1149.1 JTAG
Pin/Package Suffix W = power PQFP; -20 = 23.6 ns speed grade —
Suhu Operasi Commercial (0C to +70C) [DATA_NEEDED: exact temp grade] [DATA_NEEDED: operating temperature range]
Jenis Pemasangan Surface Mount Surface Mount
Status RoHS Non-compliant (legacy PQFP) [DATA_NEEDED: confirm from official doc] Lead-free (N suffix)
Lead-Free [DATA_NEEDED] —
Boson Bebas [DATA_NEEDED] —
Aras MSL [DATA_NEEDED] [DATA_NEEDED: MSL level]
Device Family — MAX 9000 (EPM9560)
Usable Gates — 12,000
Propagation Delay (tPD) — 20 ns
Tegangan Pemberi Arus — 5.0 V
Configuration Technology — EEPROM (non-volatile)
JTAG Interface — IEEE Std. 1149.1
Logic Architecture — Multiple Array MatriX (MAX), third-generation CMOS EEPROM
Flip-Flops — 772 (per EPM9560 series data)
Speed Grade — -20 (20 ns)

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