MPC8548PXAUJB vs MPC8536EAVTAQG Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci MPC8548PXAUJB disebabkan oleh NXP Semiconductors dan MPC8536EAVTAQG disebabkan oleh NXP Semiconductors. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
NXP Semiconductors
MPC8536EAVTAQG - PowerQUICC III 1GHz e500 MPU | NXP/Freescale
MPC8536EAVTAQG NrndPengandingan Spesifikasi
| Parametr | MPC8548PXAUJB | MPC8536EAVTAQG |
|---|---|---|
| Merek | NXP Semiconductors | NXP Semiconductors |
| Kategori | Microcontrollers | Microcontrollers |
| Status Lingkungan Hidup | Aktif | NRND |
| Manufacturer | NXP Semiconductors (formerly Freescale) | — |
| Series | PowerQUICC III / MPC85xx | — |
| Core Architecture | PowerPC e500 (32-bit) | — |
| Number of Cores | 1 | 1 |
| Maximum Core Frequency | 1.333 GHz | — |
| Kemasan | 783-FCBGA (29x29 mm) | 783-FCPBGA (29x29 mm) |
| Jenis Pemasangan | Surface Mount | Surface Mount (BGA) |
| Suhu Operasi | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| L1 Cache | 32 KB instruction + 32 KB data | — |
| L2 Cache | [DATA_NEEDED: L2 cache size] | — |
| Memory Controller | DDR2 SDRAM, up to [DATA_NEEDED: max memory] | — |
| Ethernet | 4x Gigabit Ethernet (SGMII) | — |
| PCI Express | [DATA_NEEDED: PCIe lane count] | — |
| RapidIO | Yes (serial RapidIO) | — |
| QUICC Engine | Yes (protocol offload subsystem) | — |
| Status RoHS | Compliant (per NXP product page) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes | — |
| Processor Series | — | MPC85xx (PowerQUICC III) |
| Core | — | PowerPC e500, 32-bit |
| Frekuensi Klock Maksimum | — | 1.0 GHz |
| Lebar Bus Data | — | 32 bit |
| Encryption Support | — | Yes ('E' suffix indicates encryption-enabled silicon) |
| Tegangan Pemberi Arus | — | [DATA_NEEDED: core/IO supply voltage] |
| Integrated Peripherals | — | QUICC Engine, DDR controller, Gigabit Ethernet, PCI Express |
| Instruction Set Architecture | — | Power Architecture (Book-E) |
| On-chip Cache | — | [DATA_NEEDED: L1/L2 cache configuration] |
| Aras MSL | — | [DATA_NEEDED: MSL rating] |