RTAX1000SL-CGS624V vs RTAX2000SL-CGS624V Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci RTAX1000SL-CGS624V disebabkan oleh Microchip Technology dan RTAX2000SL-CGS624V disebabkan oleh Microchip Technology. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Microchip Technology
RTAX1000SL-CGS624V RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip

RTAX1000SL-CGS624V - 1M-Gate Rad-Tolerant FPGA | Microchip

RTAX1000SL-CGS624V ✓ Aktif
Microchip Technology
RTAX2000SL-CGS624V RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip

RTAX2000SL-CGS624V ✓ Aktif

Pengandingan Spesifikasi

Parametr RTAX1000SL-CGS624V RTAX2000SL-CGS624V
Merek Microchip Technology Microchip Technology
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Aktif Aktif
System Gates 1,000,000 —
Logic Cells 18144 —
CLBs 12096 —
Technology Digital CMOS antifuse CMOS antifuse (nonvolatile)
Family RTAX-S/SL Radiation-Tolerant FPGAs RTAX-S/SL Radiation-Tolerant FPGA
Programmability One-Time Programmable (antifuse), live at power-up —
Embedded Memory Embedded SRAM with built-in FIFO control logic 540 kbits with optional EDAC protection
Clock Resources Segmentable clocks, chip-wide highway routing —
Carry Logic Yes (dedicated fast carry chain) —
Kemasan CGS624 (624-column ceramic grid array) CG624 ceramic package
Jenis Pemasangan Surface Mount —
Application Domain Space-flight systems Space-flight systems
Radiation Tolerance Radiation-tolerant (TID/SEE per manufacturer qualification) —
Max Family Density 4,000,000 equivalent system gates —
Base Commercial Family Axcelerator —
Suhu Operasi [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Tegangan Pemberi Arus [DATA_NEEDED: core supply voltage] —
Maximum User I/O [DATA_NEEDED: maximum user I/O count] —
Equivalent System Gates — 2000000
Logic Cells (CLBs) — 21504
User I/Os (maximum) — 684
Total Ionizing Dose (TID) — 300 krad (Si) functional / 200 krad (Si) parametric
Single-Event Upset Rate — Less than 1E-10 errors per bit-day
Configuration — One-time programmable antifuse, live at power-up
Embedded SRAM Features — Built-in FIFO control logic
Clock Architecture — Segmentable clock structures
Routing — Chip-wide highway routing, carry logic
Core Supply Voltage — [DATA_NEEDED: core supply voltage]
I/O Supply Voltage — [DATA_NEEDED: I/O supply voltage]
Speed Grade — [DATA_NEEDED: speed grade]
System Frequency (typical) — [DATA_NEEDED: system frequency]

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