ATSAMD20J17A-ANT - 48MHz Cortex-M0+ 128KB Flash MCU | Microchip
MPN: ATSAMD20J17A-ANT β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4.18 | $4.18 |
| 10 | $3.72 | $37.20 |
| 100 | $3.14 | $314.00 |
| 500 | $2.78 | $1,390.00 |
| 1,000 | $2.45 | $2,450.00 |
ATSAMD20J17A-ANT Overview
A microcontroller (MCU) is a single-chip computer that integrates a CPU core, program and data memory, timers, communication peripherals, and I/O on one die. The Cortex-M0+ architecture used here belongs to the ARM Cortex-M family, the dominant 32-bit core family in low-power embedded systems. The ATSAMD20J17A-ANT sits inside the SAM D20 product line (Microchip's Cortex-M0+ family), which spans 32 to 64 pins and 16KB to 256KB flash. The hierarchy is: microcontroller -> embedded MCU -> ARM Cortex-M MCU -> Cortex-M0+ MCU -> SAM D20 family -> SAM D20J series (64-pin, larger memory) -> ATSAMD20J17A-ANT.
Key differentiating features include the Event System inter-peripheral signaling fabric, six SERCOM channels (each configurable as UART, SPI, or I2C), full-speed USB device support on select SAM D20J pins, a 12-bit 350ksps ADC with up to 20 channels, and hardware crypto is not present at this tier. Pin migration paths exist between ATSAMD20J14, J15, J16, J17, and J18 variants, allowing upward memory scaling within the same 64-pin TQFP footprint.
Architecturally, the device pairs the Cortex-M0+ core (achieving 2.14 CoreMark/MHz) with a low-power segmented power domain architecture that supports Sleep, Standby, Backup, and Off modes. The integrated 32.768 kHz oscillator and digital Frequency-Locked Loop (DFLL) allow the CPU to run from internal references without external crystals in cost-sensitive applications.
Typical applications include home automation nodes, consumer appliances, smart metering endpoints, industrial sensor hubs, and low-cost USB HID peripherals. Its combination of Cortex-M0+ simplicity and SAM D20 peripheral set suits battery-powered IoT edge nodes where deterministic response to peripheral events is required.
When designing in this part, pay attention to the decoupling network (one 100nF + one 4.7uF near each VDD pin pair), ensure the NRST reset circuit uses the recommended 10k pull-up with the optional 1nF capacitor, and confirm that your toolchain supports the Cortex-M0+ instruction set. ATSAM-ICE or J-Link debug probes are recommended for development.
This page synthesizes distributor stock and pricing, verified drop-in same-package alternatives from Microchip's SAM D20 family, and practical design guidance not collected in a single place on the manufacturer datasheet.
Drop-in alternatives for ATSAMD20J17A-ANT β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ATSAMD20J17A-ANT (same form factor and footprint) β differing in ADC, Core Architecture, DAC, MSL Level, Package.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ATSAMD20J18A-ANT
β Drop-Inπ Reference alternative (not in catalog)
ATSAMD20J16A-ANT
β Drop-Inπ Reference alternative (not in catalog)
ATSAMD20J15A-ANT
β Drop-Inπ Reference alternative (not in catalog)
ATSAMD21J17A-ANT
β Drop-Inπ Reference alternative (not in catalog)
ATSAMC21J17A-ANT
β Drop-Inπ Reference alternative (not in catalog)
ATSAMD20J17A-ANT Maximum Ratings & Electrical Characteristics
| Core Architecture | ARM Cortex-M0+ (32-bit) |
| Series | SAM D20J (64-pin) |
| Maximum CPU Frequency | 48 MHz |
| Program Flash Memory | 128 KB (128K x 8) |
| SRAM | 16 KB |
| Operating Voltage Range | 1.6 V to 3.6 V |
| Package | 64-TQFP (10x10 mm) with exposed pad |
| Operating Temperature Range | -40 C to +105 C (industrial) |
| ADC | 12-bit, up to 20 channels, 350 ksps |
| DAC | 10-bit, 1 channel |
| Peripheral Touch Controller (PTC) | 256 channels supported |
| SERCOM Modules | 6 (each configurable as UART/SPI/I2C) |
| Timers/Counters | TC x6, TCC x3, RTC x1, WDT x1 |
| CoreMark/MHz | 2.14 |
| RoHS Status | Compliant (Pb-free) |
| MSL Level | 3 (168 hours) |
| Mounting Type | Surface Mount |
ATSAMD20J17A-ANT Pin Configuration
| Pin 1 | PA00 β GPIO / XIN32 |
| Pin 2 | PA01 β GPIO / XOUT32 |
| Pin 3 | PA02 β GPIO / AIN0 |
| Pin 4 | PA03 β GPIO / AIN1 / VREFA |
| Pin 5 | GND β Ground |
| Pin 6 | VDDIO β I/O supply |
| Pin 7 | VDDIN β Voltage regulator input |
| Pin 8 | PA04 β GPIO / AIN2 |
| Pin 9 | PA05 β GPIO / AIN3 |
| Pin 10 | PA06 β GPIO / AIN4 |
| Pin 11 | PA07 β GPIO / AIN5 |
| Pin 12 | PA08 β GPIO / AIN6 |
| Pin 13 | PA09 β GPIO / AIN7 |
| Pin 14 | PA10 β GPIO / AIN8 |
| Pin 15 | PA11 β GPIO / AIN9 |
| Pin 16 | GND β Ground |
| Pin 17 | VDDIO β I/O supply |
| Pin 18 | PA12 β GPIO |
| Pin 19 | PA13 β GPIO |
| Pin 20 | PA14 β GPIO / XIN |
| Pin 21 | PA15 β GPIO / XOUT |
| Pin 22 | PA16 β GPIO |
| Pin 23 | PA17 β GPIO |
| Pin 24 | PA18 β GPIO |
| Pin 25 | PA19 β GPIO |
| Pin 26 | GND β Ground |
| Pin 27 | VDDIO β I/O supply |
| Pin 28 | PA20 β GPIO |
| Pin 29 | PA21 β GPIO |
| Pin 30 | PA22 β GPIO |
| Pin 31 | PA23 β GPIO |
| Pin 32 | PA24 β GPIO |
| Pin 33 | PA25 β GPIO |
| Pin 34 | PA26 β GPIO |
| Pin 35 | PA27 β GPIO |
| Pin 36 | PA28 β GPIO |
| Pin 37 | PA29 β GPIO |
| Pin 38 | PA30 β GPIO / SWCLK |
| Pin 39 | PA31 β GPIO / SWDIO |
| Pin 40 | GND β Ground |
| Pin 41 | VDDIO β I/O supply |
| Pin 42 | PB00 β GPIO |
| Pin 43 | PB01 β GPIO |
| Pin 44 | PB02 β GPIO / AIN10 |
| Pin 45 | PB03 β GPIO / AIN11 |
| Pin 46 | PB04 β GPIO / AIN12 |
| Pin 47 | PB05 β GPIO / AIN13 |
| Pin 48 | PB06 β GPIO / AIN14 |
| Pin 49 | PB07 β GPIO / AIN15 |
| Pin 50 | PB08 β GPIO / AIN16 |
| Pin 51 | PB09 β GPIO / AIN17 |
| Pin 52 | PB10 β GPIO / AIN18 |
| Pin 53 | PB11 β GPIO / AIN19 |
| Pin 54 | PB12 β GPIO |
| Pin 55 | PB13 β GPIO |
| Pin 56 | PB14 β GPIO |
| Pin 57 | PB15 β GPIO |
| Pin 58 | PB16 β GPIO |
| Pin 59 | PB17 β GPIO |
| Pin 60 | VDDIN β Voltage regulator input |
| Pin 61 | VDDOUT β Internal regulator output (1.2 V / 1.0 V) |
| Pin 62 | NRST β Reset input, active low |
| Pin 63 | VPP β Programming voltage / NC in normal use |
| Pin 64 | GND β Ground / exposed pad (EP) |
Typical Applications
ATSAMD20J17A-ANT is suitable for 6 applications: Home Automation Hubs, Smart Metering and Energy Monitoring, Consumer Appliance Control Boards, Industrial Sensor Hubs, Battery-Powered IoT Edge Nodes, Capacitive Touch User Interfaces.
Home Automation Hubs
The ATSAMD20J17A-ANT is well suited to home automation hubs and end nodes thanks to its six SERCOM channels (each software-configurable as UART, SPI, or I2C), which let a single MCU bridge Wi-Fi/BLE modules, sensors, and actuators. The 48 MHz Cortex-M0+ core and 128 KB flash handle Zigbee/Z-Wave gateway stacks or Matter commissioning code, while the 12-bit ADC reads potentiometers and analog sensors without external ADC ICs. Low-power Standby mode at <1 uA lets battery-powered door/window sensors last multi-year on coin cells.
Recommended
Smart Metering and Energy Monitoring
In smart metering, the ATSAMD20J17A-ANT's 12-bit 350 ksps ADC simultaneously samples voltage and current waveforms for energy calculation. The integrated 10-bit DAC drives analog front-end gain calibration, while the 16 KB SRAM buffers waveform samples for RMS and harmonic computation. Hardware crypto is absent, but the SAM D20 Event System allows deterministic timing of ADC conversions relative to zero-crossing interrupts, critical for class-1 metering accuracy in residential electricity and water meters.
Recommended
Consumer Appliance Control Boards
The 64-pin TQFP ATSAMD20J17A-ANT sits comfortably in white-goods control boards (washing machines, dishwashers, induction cooktops) where its 6 SERCOM ports talk to user-interface keypads, motor drivers, and display modules. The 256-channel Peripheral Touch Controller (PTC) replaces mechanical buttons with capacitive sliders that survive moisture and grime. Wide -40 C to +105 C industrial temperature range covers under-hood automotive-adjacent appliance environments and outdoor enclosures.
Recommended
Industrial Sensor Hubs
Industrial sensor hubs use the ATSAMD20J17A-ANT to aggregate analog and digital sensor data over RS-485, IO-Link, or 4-20 mA loops. The 20-channel ADC multiplexes thermocouples, pressure transducers, and strain gauges, while SERCOM-based UART bridges to RS-485 transceivers. The 1.6-3.6 V supply and exposed thermal pad allow operation in sealed IP67 enclosures with no fan cooling. The 48 MHz core and Event System provide deterministic response times below 10 us, important for alarm and safety loops.
Recommended
Battery-Powered IoT Edge Nodes
The ATSAMD20J17A-ANT is ideal for battery-powered IoT edge nodes thanks to its <1 uA Standby current, RTC with calendar mode, and Event System that wakes the CPU only on a sensor threshold or scheduled timer. A 3.3 V coin cell or 2x AAA powers the 1.6 V minimum-supply core directly, removing the need for a boost regulator in many designs. The 128 KB flash stores over-the-air update images plus application code, and 16 KB SRAM buffers sensor frames before transmission.
Recommended
Capacitive Touch User Interfaces
The 256-channel Peripheral Touch Controller (PTC) integrated into the ATSAMD20J17A-ANT supports up to 256 mutual-capacitance electrodes - enough for full touchscreens plus gesture and proximity zones. The hardware PTC engine offloads scanning from the CPU, allowing the M0+ core to remain in Standby between touches while drawing microamp-level current. The 64-pin TQFP exposes enough GPIO for backlight drivers, haptic feedback, and I2C-controlled displays alongside the touch matrix.
Recommended
Recommended Products Summary
Engineering reference data for ATSAMD20J17A-ANT β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATSAMD20J18A-ANT | ATSAMD20J16A-ANT | ATSAMD20J15A-ANT | ATSAMD21J17A-ANT | ATSAMC21J17A-ANT |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 64-TQFP (10x10 mm) | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same | 64-TQFP (10x10 mm) - same |
| Core | Cortex-M0+ @ 48 MHz | Cortex-M0+ @ 48 MHz | Cortex-M0+ @ 48 MHz | Cortex-M0+ @ 48 MHz | Cortex-M0+ @ 48 MHz | Cortex-M0+ @ 48 MHz |
| Flash | 128 KB | 256 KB | 64 KB | 32 KB | 128 KB | 128 KB |
| SRAM | 16 KB | 32 KB | 8 KB | 4 KB | 16 KB | 16 KB |
| USB | Not present | Not present | Not present | Not present | USB 2.0 FS device + host | USB 2.0 FS via SERCOM |
| CAN | Not present | Not present | Not present | Not present | Not present | CAN-FD |
| Operating Voltage | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 1.6 V to 3.6 V | 2.7 V to 5.5 V |
| Operating Temperature | -40 C to +105 C | -40 C to +105 C | -40 C to +105 C | -40 C to +105 C | -40 C to +125 C | -40 C to +85 C |
Key Differentiators
- Same-family upward memory migration without PCB change (vs ATSAMD20J16A-ANT)
- Lower-power Sleep/Standby modes than SAM D21 (vs ATSAMD21J17A-ANT)
- Industrial -40 to +105 C temperature range standard (vs ATSAMC21J17A-ANT)
- Dedicated 256-channel PTC for capacitive touch (vs ATSAMD20J18A-ANT)
Design Notes
Per the SAM D20 datasheet, decouple every VDDIO pin with a 100 nF ceramic cap placed within 3 mm of the pin, and add a shared 4.7 uF bulk cap on the VDDIN rail. The internal 1.2 V/1.0 V regulator (VDDOUT, pin 61) requires its own 1 uF cap. Brown-out resets below 1.55 V; if you operate near 1.6 V minimum, size the supply decoupling to limit inrush dip on ADC conversions. Estimated: a typical 4-layer FR4 board with 6 VDDIO pins and a 4.7 uF bulk cap limits dip below 50 mV at 50 mA load steps.
Place the 32.768 kHz crystal within 5 mm of XIN32/XOUT32 (pins 1/2) with a grounded guard ring; keep the traces short and symmetric. Route SWD/SWCLK (PA30/PA31) away from analog ADC inputs to avoid debug-noise coupling on ADC readings. The 64-pin TQFP exposed thermal pad (EP, pin 64) must be soldered to a star-ground copper pour at least 4 mm^2 to meet thermal resistance spec; do not leave it floating or the junction temperature spec degrades.
SERCOM pads are software-muxed; assigning two SERCOM functions to the same physical pin causes undefined peripheral behavior. Use Atmel START or MPLAB X Harmony to lock pin assignments before PCB layout. ADC inputs above 10 kohm source impedance need the internal 1/2/4x PGA or an external buffer; the SAMD20 ADC has only a 5 pF internal hold cap, which limits acquisition time at high source impedance. Estimated: a 10 kohm source at 12-bit 350 ksps adds ~5 LSB error without buffering.
The Cortex-M0+ core has no hardware divide; avoid division-heavy code paths in time-critical loops or implement lookup tables. Do not rely on the brown-out detector for power sequencing; add an external voltage supervisor if your rails ramp slowly. When migrating from SAM D20 to SAM D21 firmware, the SERCOM pad-map registers differ - re-run peripheral configuration. Estimated: SERCOM pin mapping divergence causes ~5-10% peripheral initialization failures on D20->D21 blind migrations.
Compliance Information
RoHS and REACH compliance per Microchip product page. Industrial -40 to +105 C variant; AEC-Q100 qualification not in scope for this industrial-grade part - choose automotive-qualified SAMD20 in the same family if required. Halogen-free status not explicitly listed in available web data.
