DSPIC33CK128MC506T-I/MR - 16-bit DSC, 128KB Flash, CAN FD | Microchip
MPN: DSPIC33CK128MC506T-I/MR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $5.2 | $5.20 |
| 10 | $4.68 | $46.80 |
| 100 | $4.16 | $416.00 |
| 500 | $3.72 | $1,860.00 |
| 1,000 | $3.35 | $3,350.00 |
DSPIC33CK128MC506T-I/MR Overview
A digital signal controller combines the deterministic control of a microcontroller with the mathematical throughput of a DSP. In the power-management hierarchy, the dsPIC33CK family sits within Microchip's 16-bit DSC portfolio, purpose-built for real-time control loops such as Field-Oriented Control (FOC) motor drive and digital power conversion, where a single-cycle MAC, hardware divide and deterministic interrupt latency matter more than raw benchmark scores.
Key features include the integrated CAN Flexible Data-rate (CAN FD) controller for automotive and industrial networks, on-chip operational amplifiers that front-end the 12-bit ADC for current-sense signals, and a high-speed PWM peripheral with advanced resolution suited to switching converters and motor inverters. Four DMA channels offload the core during high-rate ADC sampling.
The 100 MIPS single-core architecture executes control loops with cycle-deterministic timing; the integrated op-amps reduce external component count in shunt-based current feedback paths, improving both BOM cost and noise performance.
Typical applications include brushless DC and PMSM motor control, digital power supplies (LLC, totem-pole PFC), automotive and industrial CAN FD nodes, and advanced sensing systems.
Design consideration: the 3.0V to 3.6V supply range requires a clean 3.3V rail; use the exposed pad as the primary ground path with a solid via array for thermal and EMC performance.
This page adds distributor-verified availability data, same-family drop-in alternatives, and practical design notes beyond the manufacturer datasheet.
Drop-in alternatives for DSPIC33CK128MC506T-I/MR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
DSPIC33CK128MC506-I/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33CK256MC506T-I/MR
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33CK64MC506T-I/MR
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
DSPIC33CK128MC506T-E/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33CH64MP506T-I/MR
✅ Drop-In📋 Reference alternative (not in catalog)
DSPIC33CK128MC506T-I/MR Maximum Ratings & Electrical Characteristics
| Core | dsPIC33CK 16-bit DSC core |
| Core Performance | 100 MIPS |
| Program Memory (Flash) | 128KB (128K x 8) |
| RAM | 16KB |
| Supply Voltage | 3.0 V to 3.6 V (3.3 V nominal) |
| Package | 64-QFN (9x9 mm), exposed pad |
| Mounting Type | Surface Mount |
| Operating Temperature | -40C to +85C (I grade) |
| CAN | CAN FD |
| ADC Resolution | 12-bit |
| On-chip Op-Amps | Yes |
| PWM | High-speed PWM |
| DMA Channels | 4 |
| Serial I/O Ports | 4 |
| Packaging | Tape and Reel (T) |
| RoHS Status | Compliant (per distributor listing) |
| Functional Safety | FuSa family (per distributor listing) |
DSPIC33CK128MC506T-I/MR 64-qfn (9x9 mm), exposed pad Pin Configuration Guide
Pin configuration for DSPIC33CK128MC506T-I/MR (64-qfn (9x9 mm), exposed pad package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for DSPIC33CK128MC506T-I/MR.
Refer to the datasheet for full pin configuration.
Typical Applications
DSPIC33CK128MC506T-I/MR is suitable for 6 applications: Brushless DC / PMSM Motor Control (FOC), Digital Power Conversion (LLC, Totem-Pole PFC), Automotive and Industrial CAN FD Nodes, Precision Analog Sensing and Conditioning, Industrial Automation and Robotics, Power Tool and E-Mobility Drives.
Brushless DC / PMSM Motor Control (FOC)
The DSPIC33CK128MC506T-I/MR fits sensorless and sensored FOC motor drives because its 100 MIPS dsPIC33CK core executes the Park/Clarke transforms and PI current loops in a single PWM period with cycle-deterministic latency. The 12-bit ADC, front-ended by on-chip op-amps connected directly to shunt resistors, samples phase currents at PWM frequency, while 4 DMA channels move results to RAM without core overhead. In a typical topology, the high-speed PWM peripheral drives a three-phase inverter at 20-100 kHz with hardware dead-time insertion. The quantified benefit is a complete dual-shunt FOC loop running above 50 kHz bandwidth with margin to spare, eliminating a separate gate-driver MCU and reducing BOM cost.
Recommended
Digital Power Conversion (LLC, Totem-Pole PFC)
For digitally controlled power supplies, the DSPIC33CK128MC506T-I/MR provides the high-resolution PWM needed for sub-nanosecond effective duty-cycle resolution in LLC and totem-pole PFC stages operating at 100 kHz and above. The 100 MIPS core closes voltage and current loops with deterministic timing, while the 12-bit ADC streams input/output voltage and current samples through DMA for feed-forward compensation. Because the same device includes CAN FD, the converter can report telemetry on industrial networks without a second communication controller. The trade-off versus a dedicated digital power ASIC is flexibility: control-law changes require firmware updates, but the same PCB supports multiple product power ratings, shortening development cycles.
Recommended
Automotive and Industrial CAN FD Nodes
The integrated CAN FD controller makes the DSPIC33CK128MC506T-I/MR a strong choice for body-control, sensor-fusion and actuator nodes that must move payloads larger than the 8-byte classic CAN limit. CAN FD supports up to 64-byte data frames at higher arbitration-free data phases, and the on-chip controller offloads framing, filtering and error handling from the 100 MIPS core. In industrial networks the same node doubles as a local motor or power controller, so one DSPIC33CK replaces a communications MCU plus a control MCU. Design consideration: pair the controller with an external CAN FD transceiver rated for the network data rate, and use the device functional-safety (FuSa) documentation support where ISO 26262-style processes apply.
Recommended
Precision Analog Sensing and Conditioning
The on-chip operational amplifiers of the DSPIC33CK128MC506T-I/MR directly condition low-level sensor signals before the 12-bit ADC, which suits weight-scale, pressure and current-sensing applications that would otherwise need external instrumentation amplifiers. Configuring the op-amps as programmable-gain stages ahead of the ADC saves board area and removes offset-matching errors between discrete stages. With 4 serial ports and 4 DMA channels, sampled data can be streamed to a host over UART or SPI continuously without core intervention. The quantified benefit is fewer analog components per channel and a shorter signal path, which reduces noise pickup; for highest accuracy, calibrate gain and offset in firmware using known reference inputs.
Recommended
Industrial Automation and Robotics
In factory automation, the DSPIC33CK128MC506T-I/MR serves as a joint controller or intelligent actuator node, combining real-time motor control with a CAN FD fieldbus interface on one chip. The 100 MIPS core handles trajectory interpolation and encoder feedback, while the 12-bit ADC and op-amps read potentiometer, hall or resolver-derived signals. Deterministic interrupt response ensures the control loop does not jitter when communication traffic spikes. Multiple DSPIC33CK nodes can share a CAN FD backbone at data rates far beyond classic CAN, enabling coordinated multi-axis motion. The single-chip integration of control plus networking reduces node cost and PCB area compared with an MCU plus separate CAN controller architecture.
Recommended
Power Tool and E-Mobility Drives
Battery-powered tools, e-bikes and light e-mobility platforms benefit from the DSPIC33CK128MC506T-I/MR because one controller manages the PMSM traction motor via FOC, monitors battery current through the on-chip op-amp/ADC path, and communicates state-of-charge and fault data over CAN FD to a battery-management unit. Running from a regulated 3.3V rail derived from the battery pack, the 100 MIPS core sustains sensorless startup algorithms that are computationally demanding at low speed. The industrial temperature grade of -40C to +85C covers unheated outdoor enclosures. The practical benefit is a single-chip drive-plus-connectivity solution that shrinks controller PCB size in handle- and hub-constrained mechanical packages.
Recommended
Recommended Products Summary
Engineering reference data for DSPIC33CK128MC506T-I/MR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | DSPIC33CK128MC506-I/MR | DSPIC33CK256MC506T-I/MR | DSPIC33CK64MC506T-I/MR | DSPIC33CK128MC506T-E/MR | DSPIC33CH64MP506T-I/MR |
|---|---|---|---|---|---|---|
| Package | 64-QFN (9x9 mm) | 64-QFN (9x9 mm) - same | 64-QFN (9x9 mm) - same | 64-QFN (9x9 mm) - same | 64-QFN (9x9 mm) - same | 64-QFN (9x9 mm) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Flash Program Memory | 128KB | 128KB | 256KB | 64KB | 128KB | 64KB per core (dual-core) |
| Core / Performance | Single dsPIC33CK core, 100 MIPS | Single core, 100 MIPS | Single core, 100 MIPS | Single core, 100 MIPS | Single core, 100 MIPS | Dual core (main + secondary) |
| CAN Interface | CAN FD | CAN FD | CAN FD | CAN FD | CAN FD | CAN FD |
| Operating Temperature | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) | -40C to +85C (I) | -40C to +125C (E) | -40C to +85C (I) |
| Packaging | Tape & Reel (T) | Tray | Tape & Reel (T) | Tape & Reel (T) | Tape & Reel (T) | Tape & Reel (T) |
Key Differentiators
- Largest Flash in the pin-compatible family at this price point (vs DSPIC33CK64MC506T-I/MR)
- Dual on-chip op-amps eliminate external current-sense amplifiers (vs DSPIC33CK128MC506-I/MR)
- Single-core determinism vs dual-core complexity (vs DSPIC33CH64MP506T-I/MR)
- Extended temperature option on the same footprint (vs DSPIC33CK128MC506T-E/MR)
Design Notes
The 64-QFN (9x9) exposed pad is the primary ground and thermal path. Create a 5x5 (or denser) via array under the exposed pad to the ground plane, with a minimum 2 oz copper ground pour for power-loop designs. Do not route signals under the QFN body on the top layer. Follow the Microchip QFN layout application notes for stencil apertures (typically 50-70% coverage split into multiple apertures) to avoid voiding under the pad during reflow.
The dsPIC33CK MC50x requires a 3.0V to 3.6V supply with adequate decoupling: place 0.1uF ceramics at each VDD pin pair plus one bulk 10uF capacitor near the device. When powered from a switching pre-regulator (common in motor drives), add an RC or ferrite filter to keep high-frequency ripple out of the ADC reference path. Use a precision reference or the internal reference calibrated in firmware for current-loop accuracy; ADC errors translate directly into torque ripple in FOC applications.
The 'T' in DSPIC33CK128MC506T-I/MR denotes tape-and-reel packaging only - do not confuse it with a temperature or speed variant. Verify Peripheral Pin Select (PPS) assignments early in design because CAN FD, PWM fault inputs and op-amp outputs have constrained pin mappings in the 64-QFN. Also confirm temperature-grade suffix (I vs E) on purchase orders, since the same footprint ships in both grades and the E grade costs more.
Compliance Information
RoHS status per distributor listings (full-electronic.com shows RoHS compliant). REACH, halogen-free and conflict-minerals status not stated in provided data.
